Microchip Technology AT28C010-20TI

Overview

AT28C010-20TI from Atmel is a 1-Mbit (128K × 8) paged parallel EEPROM with JEDEC-standard byte-wide pinout, 200 ns read access time, 10 ms maximum page write cycle, and industrial temperature range (–40°C to +85°C). It operates on single 5V ±10% supply, supports hardware/software data protection, and is used in firmware storage, configuration memory, and boot code retention for embedded controllers.

For engineers reviewing the AT28C010-20TI datasheet, AT28C010-20TI pinout, AT28C010-20TI application, or AT28C010-20TI equivalent, key selection criteria include page-write capability (1–128 bytes), DATA polling/Toggle Bit end-of-write detection, CMOS/TTL compatibility, VCC sense write inhibit, and PLCC-32 industrial-grade packaging.

Technical Context

The AT28C010-20TI implements a 128-byte internal page register that latches address and data during write initiation, freeing the bus for concurrent operations. Its internal control timer automates programming after latch completion, eliminating external timing circuitry.

It supports three write modes: byte write, page write (with 150 µs inter-byte load window), and optional software chip erase. Data integrity is enforced via hardware VCC sensing (<3.8V inhibition), noise filtering (<15 ns pulse rejection), and dual-line CE/OE control to prevent bus contention during reads.

Key Specifications

Pinout & Package

AT28C010-20TI is packaged in a 32-lead Plastic J-leaded Chip Carrier (PLCC-32), JEDEC MS-016AE compliant, with pin 1 marked and designated "Don't Connect" (DC). The package supports reflow soldering and offers robust thermal performance for industrial environments.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar paged parallel EEPROM applications.

Compared with AT28C010-20PI and AT28C010-20TC, the AT28C010-20TI offers superior thermal cycling reliability and mechanical robustness in vibration-prone industrial enclosures due to its PLCC ceramic-body construction and gull-wing lead geometry.

Availability

AT28C010-20TI is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, automotive electronics, and telecom infrastructure requiring stable component supply across extended temperature ranges and long product lifecycles.

Supply support for AT28C010-20TI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.

The AT28C010 product line was designed for reliable, low-power, field-upgradable firmware and configuration storage in industrial and automotive systems where parallel interface simplicity and JEDEC compatibility are essential.

FAQ

What is the maximum page write size supported by the AT28C010-20TI?

The AT28C010-20TI supports page write operations of 1 to 128 bytes per cycle. All bytes must reside within the same 128-byte page boundary defined by address bits A7–A16. This capability enables efficient firmware updates without requiring external buffering or complex timing control in the host system. The AT28C010-20TI's internal page register handles address and data latching automatically.

Does the AT28C010-20TI require a 12V programming voltage?

No, the AT28C010-20TI operates entirely from a single 5V ±10% supply for both read and write operations. A 12V voltage is required only for accessing the optional 128-byte device identification area (addresses 1FF80H–1FFFFH) via pin A9 - standard memory operations do not use this voltage. The AT28C010-20TI's VCC-sense circuitry inhibits writes below 3.8V to prevent corruption during brownout conditions.

How does DATA polling work on the AT28C010-20TI?

During a write cycle, reading the last written byte returns the complement of that data on I/O7 until programming completes. Once valid data appears on I/O7, the write cycle is finished. This allows the host to poll asynchronously without timers. The AT28C010-20TI supports this feature across all operating modes and temperature ranges, and it works identically for both byte and page writes.

Can the AT28C010-20TI be used as a direct replacement for standard SRAM?

The AT28C010-20TI is accessed like SRAM for reads (CE/OE low, WE high) and supports identical JEDEC byte-wide pinout, but it is not a true SRAM replacement due to write latency and nonvolatility. While read timing matches SRAM, write cycles require 10 ms page programming and end-of-write detection. The AT28C010-20TI is intended for nonvolatile storage-not volatile working memory-so system firmware must implement polling or toggle-bit checks.

What is the purpose of the Software Data Protection (SDP) feature in the AT28C010-20TI?

The SDP feature in the AT28C010-20TI prevents inadvertent writes using a user-defined 3-byte command sequence (AAh→55h→A0h) written to specific addresses. Once enabled, all subsequent writes require reissuing the sequence. The AT28C010-20TI ships with SDP disabled, and the protection persists across power cycles. This adds a layer of firmware-level security beyond hardware write-inhibit signals like CE or WE.