Microchip Technology AT28C010-25DM/883

Overview

AT28C010-25DM/883 from Microchip Technology is a military-grade 1-Mbit (131,072 × 8) paged parallel EEPROM with 120 ns read access time, 10 ms maximum page write cycle, and single 5V ±10% supply operation. It features hardware/software data protection, DATA polling and toggle-bit write completion detection, and JEDEC-approved byte-wide pinout. It serves as nonvolatile program/data storage in avionics control modules requiring radiation-tolerant, long-retention memory.

For engineers reviewing the AT28C010-25DM/883 datasheet, AT28C010-25DM/883 pinout, AT28C010-25DM/883 application, or AT28C010-25DM/883 equivalent, key selection considerations include its MIL-STD-883 Class B qualification, 128-byte page register architecture, -55°C to +125°C operating range, CMOS/TTL-compatible I/O, and 10,000/100,000 endurance cycles depending on grade.

Technical Context

The AT28C010-25DM/883 implements a paged write architecture with internal 128-byte address and data latches, enabling up to 128 bytes to be loaded before automatic internal programming. Its dual-line chip enable (CE) and output enable (OE) control allows flexible bus contention management in shared-memory systems.

Write completion is verified via DATA polling on I/O7 (complement-to-data during write, true data after completion) or toggle-bit monitoring on I/O6. Hardware protection includes VCC sense (<3.8 V inhibits writes), 5 ms power-on delay, noise filtering (<15 ns pulses ignored), and CE/OE/WE state-dependent write inhibit logic.

Key Specifications

Pinout & Package

AT28C010-25DM/883 is packaged in a 32-lead CERDIP (Ceramic Dual Inline Package) with 0.600" width, compliant with MIL-STD-1835 D-16 Config A and JEDEC MS-011. Pin 1 is index-marked; pins 1 and 30 are NC; pin 16 is GND; pin 32 is VCC.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar EEPROM applications.

Compared with AT28C010-25DM/883, the AT28C010-12DM/883 offers identical functionality with guaranteed 120 ns access, while the AT28C256-25DM/883 provides proven military reliability at reduced density and page size-both serve as validated alternatives in avionics and defense electronics where qualification traceability is mandatory.

Availability

AT28C010-25DM/883 is available at Aetrix Electronics and suitable for avionics flight control units, tactical radio firmware storage, missile guidance system bootloaders, and nuclear power plant safety controllers requiring stable component supply across extended product lifecycles.

Supply support for AT28C010-25DM/883 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with deep expertise in military-qualified components and long-term product support.

The AT28C010 product line was designed for high-reliability, radiation-tolerant nonvolatile storage in aerospace, defense, and critical infrastructure systems where data integrity and multi-decade longevity are mandatory.

FAQ

What is the operating temperature range for the AT28C010-25DM/883?

The AT28C010-25DM/883 is qualified for operation from -55°C to +125°C per MIL-STD-883 Method 1010.8. This extended range enables deployment in jet engine bays, missile canisters, and desert-deployed electronic warfare systems where ambient temperatures exceed commercial-grade limits. The AT28C010-25DM/883 maintains full read/write functionality and data retention specifications across this entire range.

How does the page write function work on the AT28C010-25DM/883?

The AT28C010-25DM/883 uses an internal 128-byte page register: once CE and WE initiate a write, up to 128 bytes can be loaded sequentially within 150 µs intervals. Address bits A7–A16 define the target page; A0–A6 select bytes within that page. After the final byte, the device automatically executes the 10 ms internal programming cycle. The AT28C010-25DM/883 does not require external timing control during this process.

What write protection mechanisms does the AT28C010-25DM/883 support?

The AT28C010-25DM/883 implements dual-layer protection: hardware-level inhibition via VCC sensing (<3.8 V blocks writes), 5 ms power-on delay, and noise filtering on CE/WE inputs; plus software-level protection using a three-byte unlock sequence (AAh/55h/A0h) to enable/disable write lock. Both mechanisms operate independently-the AT28C010-25DM/883 remains protected even if one layer fails.

Can the AT28C010-25DM/883 be used in place of standard SRAM in existing designs?

Yes-the AT28C010-25DM/883 is accessed like Static RAM for reads and writes, with identical CE/OE/WE control timing and JEDEC byte-wide pinout. However, write cycles require 10 ms and must be confirmed via DATA polling or toggle bit; unlike SRAM, it cannot accept new writes during programming. The AT28C010-25DM/883 is ideal for replacing battery-backed SRAM in legacy systems where maintenance-free nonvolatility is needed.

What package type is used for the AT28C010-25DM/883?

The AT28C010-25DM/883 uses a 32-lead CERDIP (Ceramic Dual Inline Package) with 0.600" width, conforming to MIL-STD-1835 D-16 Config A and JEDEC MS-011. It features hermetically sealed ceramic construction, gold-plated leads, and laser-trimmed marking including "%%DM/883" indicating 250 ns speed grade, military screening, and Class B qualification. This package ensures long-term reliability in high-humidity and high-vibration environments.