Microchip Technology AT28C010E-20TI
- Part No.:
- AT28C010E-20TI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-TFSOP (0.724", 18.40mm Width)
- Datasheet:
-
AT28C010E-20TI.pdf
- Description:
- IC EEPROM 1MBIT PARALLEL 32TSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT28C010E-20TI from Microchip Technology (formerly Atmel) is a 1-Mbit (128K × 8) paged parallel EEPROM with JEDEC-standard byte-wide pinout, 200 ns read access time, 10 ms maximum page write cycle, and industrial temperature range (–40°C to +85°C). It operates from a single 5V ±10% supply, supports hardware/software data protection, and is used in firmware storage, configuration memory, and boot code retention for embedded controllers.
For engineers reviewing the AT28C010E-20TI datasheet, AT28C010E-20TI pinout, AT28C010E-20TI application, or AT28C010E-20TI equivalent, key selection criteria include page-write endurance (10⁵ cycles), CMOS standby current (200 µA), DATA polling/Toggle Bit write-completion detection, and PLCC-32 industrial-grade packaging.
Technical Context
The AT28C010E-20TI implements a 128-byte internal page register that latches address and data during write operations, freeing the bus for concurrent system activity. Its internal control timer automates programming after latch completion, eliminating external timing circuitry.
It supports three write modes: byte write, page write (1–128 bytes within same A7–A16 page), and optional software chip erase. Write inhibition is enforced via VCC sense (<3.8 V), 5 ms power-on delay, noise filtering (<15 ns pulses rejected), and dual-line CE/OE/WE control logic.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1 Mbit (131,072 × 8), organized as 128K words × 8 bits - supports full byte-addressable nonvolatile storage without external decoding. |
| Read Access Time | 200 ns max - enables direct replacement of SRAM in legacy 8-bit microcontroller systems requiring no wait states at ≤5 MHz bus speeds. |
| Page Write Cycle | 10 ms max - allows up to 128 bytes to be written per internal programming operation, reducing host CPU overhead vs. byte-by-byte writes. |
| Endurance | 100,000 write/erase cycles - validated high-endurance variant ('E' suffix) suitable for field-updatable configuration or calibration data. |
| Standby Current | 200 µA CMOS - enables low-power retention in battery-backed or energy-constrained industrial control modules. |
| Supply Voltage | 5V ±10% - compatible with standard TTL/CMOS logic families and legacy 5V system rails without level-shifting. |
| Operating Temperature | –40°C to +85°C - qualified for industrial environments including motor drives, PLCs, and instrumentation. |
Pinout & Package
AT28C010E-20TI is supplied in a 32-lead Plastic J-Leaded Chip Carrier (PLCC-32) package with JEDEC MS-016 AE outline. Pin 1 is designated "Don't Connect" (DC); all NC pins must remain unconnected per datasheet guidance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A16 | Address Inputs | 17-bit address bus supporting full 128K-word addressing; A7–A16 define page boundaries for 128-byte page writes. |
| I/O0–I/O7 | Bidirectional Data Bus | True 8-bit data path for read/write; supports DATA polling on I/O7 and Toggle Bit detection on I/O6. |
| CE | Chip Enable | Active-low device select; when high, forces outputs to high-impedance and inhibits all writes regardless of OE/WE state. |
| OE | Output Enable | Active-low output control; used with CE to prevent bus contention during reads; must be high during write cycles. |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; controls byte/page write initiation and timing. |
| VCC / GND | Power Supply | Single 5V supply with dedicated ground; decoupling required within 10 mm of pins 16 (VCC) and 32 (GND). |
| NC / DC | No Connect / Don't Connect | Pins 1, 17, and 31 are NC/DC - must be left floating; soldering or routing to these pins violates specification. |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Data Protection | VCC sense, 5 ms power-on delay, and noise filtering prevent spurious writes during power ramp-up or EMI events. |
| Software Data Protection (SDP) | Three-byte unlock sequence (AAh/55h/A0h) enables/disables write protection - preserves data integrity across power cycles. |
| DATA Polling & Toggle Bit | Dual asynchronous write-completion detection methods eliminate need for fixed delays or external timers in host firmware. |
| 128-Byte Page Register | Reduces host bus occupancy by accepting up to 128 bytes before internal programming begins - improves system throughput. |
| JEDEC Byte-Wide Pinout | Direct drop-in compatibility with industry-standard EPROM/EEPROM sockets and PCB footprints (e.g., 27C512, 28C256). |
Applications
| Industrial PLC Configuration Storage | Legacy Embedded System Boot Code Retention |
|---|---|
Use Scenario: Storing user-defined I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory automation. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed during power-up and runtime reconfiguration; requires 100K-cycle endurance and –40°C to +85°C operation. Use Value: AT28C010E-20TI's 200 µA standby current extends backup battery life, while page write reduces parameter update time by >90% vs. byte writes. |
Use Scenario: Holding boot firmware and hardware initialization code for 8-bit microcontrollers (e.g., 8051, Z80) in medical diagnostic equipment. IC Role / Device Role / Timing Role: Parallel boot ROM replacement; read-access timing (200 ns) matches SRAM-based execution requirements without wait-state insertion. Use Value: JEDEC pinout and 5V compatibility enable direct substitution in existing PCBs; DATA polling simplifies bootloader write routines. |
| Telecom Line Card Calibration Data | Automated Test Equipment (ATE) Setup Profiles |
Use Scenario: Storing per-channel gain/offset calibration coefficients and sensor compensation tables in DSLAM line cards operating in temperature-variable central offices. IC Role / Device Role / Timing Role: High-reliability parameter storage with 10-year data retention; accessed infrequently but must survive 100K+ field updates over product lifetime. Use Value: AT28C010E-20TI's 10⁵ endurance rating and industrial temp grade ensure long-term accuracy without recalibration drift. |
Use Scenario: Maintaining test fixture configuration, DUT-specific limits, and pass/fail thresholds across multiple production batches in semiconductor ATE platforms. IC Role / Device Role / Timing Role: Field-updatable setup memory; write-protection prevents accidental overwrite during automated test sequences. Use Value: Software Data Protection (SDP) allows secure remote updates via host PC, while PLCC-32 package supports socketed field replacement. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar paged parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST M28W640ECB90ZC1 | 64-Mbit (8M × 8), 90 ns access, 3.3V core with 5V I/O tolerance; lacks page write - only byte/sector erase. | Higher density for new designs; incompatible pinout and voltage domain - requires PCB redesign. | Select only for greenfield 3.3V systems needing >1 Mbit; not a drop-in replacement. |
| ON Semiconductor CAT28C010WI-20 | Same 1-Mbit/128K×8 architecture, 200 ns access, PLCC-32, industrial temp; endurance rated at 10K cycles (non-E variant). | Lower endurance limits field-updatable use cases; identical pinout and timing - true functional substitute where 10K cycles suffice. | Valid alternative if endurance requirement is ≤10K cycles; verify SDP and DATA polling behavior matches. |
Compared with ST M28W640ECB90ZC1 and CAT28C010WI-20, the AT28C010E-20TI uniquely combines industrial-grade PLCC-32 packaging, 100K-cycle endurance, and JEDEC-compatible page write - making it the only option for retrofitting legacy 5V systems requiring robust field updates.
Availability
AT28C010E-20TI is available at Aetrix Electronics and suitable for industrial PLCs, legacy embedded boot systems, telecom line cards, and automated test equipment requiring stable component supply, long-lifecycle support, and verified industrial temperature performance.
Supply support for AT28C010E-20TI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains its legacy parallel EEPROM portfolio, emphasizing reliability, longevity, and backward compatibility for industrial and automotive applications.
The AT28C010E-20TI belongs to Atmel's 28C010 family of paged parallel EEPROMs, designed specifically for 5V systems requiring SRAM-like read performance, field-upgradable nonvolatile storage, and robust data retention in harsh environments.
FAQ
What is the endurance rating of the AT28C010E-20TI and how is it validated?
The AT28C010E-20TI is rated for 100,000 write/erase cycles, confirmed by Atmel's accelerated life testing per MIL-STD-883 methods. This high-endurance 'E' variant uses enhanced oxide processing to withstand repeated Fowler-Nordheim tunneling stress. The rating applies to both byte and page write operations under specified VCC (5V ±10%) and temperature (–40°C to +85°C) conditions. Each AT28C010E-20TI unit undergoes lot-sample endurance screening during final test.
Does the AT28C010E-20TI support true hardware write protection independent of software control?
Yes, the AT28C010E-20TI includes four hardware write-inhibit mechanisms: (1) VCC sense circuitry disables writes below ~3.8 V, (2) a 5 ms internal power-on delay timer blocks writes until supply stabilizes, (3) asserting CE high, OE low, or WE high at any time halts ongoing writes, and (4) input noise filters reject pulses <15 ns on CE/WE. These operate autonomously - no firmware or command sequence required. AT28C010E-20TI retains this protection across power cycles and brownouts.
How does DATA polling work on the AT28C010E-20TI and what pin is monitored?
During a write cycle, reading the last-written byte returns the complement of the data on I/O7 - e.g., writing 0x55 yields 0xAA on I/O7 until completion. Once programming finishes, true data appears on I/O7 and all other I/O lines. This polling can begin immediately after write initiation and requires no timing delay. The AT28C010E-20TI guarantees this behavior across its full industrial temperature range and 5V supply, enabling deterministic host firmware wait loops without fixed timeouts.
Is the AT28C010E-20TI pin-compatible with standard 27-series EPROMs like the 27C512?
No, the AT28C010E-20TI is not pin-compatible with 27C512 or other UV-erasable EPROMs. While both use 32-pin packages, the AT28C010E-20TI follows JEDEC byte-wide EEPROM pinout (e.g., WE on pin 27, OE on pin 22), whereas 27C512 places OE on pin 22 but uses PGMS/CE on different pins and lacks WE. Direct substitution requires PCB layout changes. However, AT28C010E-20TI is pin-compatible with other 28C010 variants (e.g., AT28C010-20TI) and functionally compatible with 28C256 in 128K×8 configurations.
What package type and lead finish does the AT28C010E-20TI use, and is it RoHS compliant?
The AT28C010E-20TI is packaged in a 32-lead Plastic J-Leaded Chip Carrier (PLCC-32) per JEDEC MS-016 AE, with matte tin (Sn) lead finish. It meets RoHS Directive 2011/65/EU and REACH SVHC requirements as certified by Microchip's material declarations. The PLCC body is UL 94 V-0 rated, and the device is qualified to JESD22-A108 for 10-year data retention. No lead-free exemption is applied - AT28C010E-20TI is fully lead-free and halogen-free.
AT28C010E-20TI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-TFSOP (0.724", 18.40mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 200 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-TSOP
AT28C010E-20TI FAQ
1.How can I place an order for AT28C010E-20TI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C010E-20TI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C010E-20TI reliable?
The price and inventory of AT28C010E-20TI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C010E-20TI is usually 5 days.
3.What payment methods are accepted for AT28C010E-20TI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C010E-20TI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C010E-20TI?
AT28C010E-20TI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C010E-20TI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C010E-20TI?
For technical support, including AT28C010E-20TI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C010E-20TI requirements.
6.How does Aetrix verify that AT28C010E-20TI is sourced from the original manufacturer or authorized distributors?
All AT28C010E-20TI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C010E-20TI meets industry standards.
7.What is the process for return or replacement of AT28C010E-20TI?
All AT28C010E-20TI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C010E-20TI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C010E-20TI part is unused and in its original packaging.
Return procedure for AT28C010E-20TI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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