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Microchip Technology AT28C040-25BC
- Part No.:
- AT28C040-25BC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-CDIP (0.600", 15.24mm)
- Datasheet:
-
AT28C040-25BC.pdf
- Description:
- IC EEPROM 4MBIT PARALLEL 32CDIP
- Quantity:
- Payment:
- Shipping:
Inventory:1,798
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Product details
Overview
AT28C040-25BC from Atmel is a 4-Mbit (512K × 8) paged parallel EEPROM with JEDEC-standard byte-wide pinout, 250 ns read access time, and hardware/software data protection. It operates on single 5V ±10% supply, supports automatic 256-byte page writes with internal latching and timer, and targets nonvolatile storage in embedded controllers, BIOS firmware, and industrial configuration memory.
For engineers reviewing the AT28C040-25BC datasheet, AT28C040-25BC pinout, AT28C040-25BC application, or AT28C040-25BC equivalent, key selection criteria include its 10,000-cycle endurance, 10-year data retention, DATA polling/Toggle Bit write completion detection, and LCC-44 ceramic package compatibility with legacy 8-bit parallel bus systems.
Technical Context
The AT28C040-25BC implements a CMOS-based parallel EEPROM architecture with dual-line chip enable (CE) and output enable (OE) control for bus contention avoidance, and supports both byte-write and page-write modes. Its internal 256-byte page register latches address and data on falling CE/WE edges, enabling background bus release during 10 ms internal programming.
Write cycle termination is verified via I/O7 DATA polling (complement-to-data toggle) or I/O6 Toggle Bit behavior, eliminating need for fixed delays. Hardware protection includes VCC sense (<3.8V inhibit), 5 ms power-on delay, noise filtering (<15 ns pulse rejection), and CE/OE/WE state-dependent write inhibition.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 4 Mbit (524,288 × 8 bits) - supports full BIOS or FPGA configuration image storage in single device |
| Read Access Time | 250 ns max - compatible with 4 MHz Z80/8086-style bus timing without wait states |
| Page Write Cycle Time | 10 ms max - enables rapid field updates of configuration blocks without system interruption |
| Endurance | 10,000 write/erase cycles - sufficient for firmware logging or parameter tuning in industrial controllers |
| Data Retention | 10 years at 25°C - ensures long-term reliability in unattended equipment like telecom line cards |
| Supply Voltage | 5V ±10% - interoperable with legacy TTL/CMOS logic families without level-shifting |
| Operating Temperature | 0°C to +70°C - rated for commercial-grade embedded applications including PC peripherals |
Pinout & Package
Ceramic Leadless Chip Carrier (LCC-44), non-windowed, 44-pad surface-mount package per MIL-STD-1835 C-5 and JEDEC MO-115 outlines. Pin 1 marked by corner cut; pins arranged in counter-clockwise order starting from top-left when viewed from top.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A18 | Address Inputs | 19-bit address bus supporting full 524,288-word addressing; A8–A18 define page boundaries for 256-byte page writes |
| I/O0–I/O7 | Bi-directional Data Bus | 8-bit parallel interface; I/O7 used for DATA polling, I/O6 for Toggle Bit status indication |
| CE | Chip Enable | Active-low global device select; must be low with OE low for read, or low with WE low for write |
| OE | Output Enable | Active-low output gate; high-Z state prevents bus contention when CE is asserted but read not desired |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; combined with CE for robust write initiation |
| VCC | Power Supply | +5V ±10% main supply; powers core logic and memory array; internal VCC sense disables writes below 3.8V |
| VSS | Ground | Signal and power reference plane; decoupling required within 10 mm of VCC pin |
| NC | No Connect | Unbonded pads (pins 5, 11–13, 16, 25, 27, 30, 32, 35–37, 40); must remain floating per design |
Key Features
| Feature | Design Value |
|---|---|
| Automatic Page Write | Latches up to 256 bytes internally, freeing address/data bus for other operations during 10 ms programming |
| DATA Polling & Toggle Bit | Real-time write completion detection via I/O7 complement or I/O6 toggling-no fixed timeout needed |
| Hardware Data Protection | VCC sensing, 5 ms power-on delay, and noise filtering prevent spurious writes during power transients |
| Software Data Protection (SDP) | User-enabled 3-byte command sequence (AAh/55h/A0h) locks entire array until disable command issued |
| Device Identification Area | 256-byte reserved sector (7FF80H–7FFFFH) accessible at 12V on A9 for unique device serialization |
Applications
| Industrial PLC Configuration Storage | Legacy PC BIOS Firmware Backup |
|---|---|
Use Scenario: Storing runtime-configurable I/O mapping, PID tuning parameters, and calibration coefficients in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed via 8-bit parallel bus during boot or reconfiguration; 250 ns read time aligns with microcontroller wait-state requirements. Use Value: Enables field-upgradable logic without replacing EPROMs; 10,000-cycle endurance supports frequent parameter adjustments over product lifetime. |
Use Scenario: Providing redundant storage for BIOS code and CMOS setup data in desktop motherboards using ISA or LPC-bridged parallel interfaces. IC Role / Device Role / Timing Role: Byte-addressable firmware repository with JEDEC-compatible pinout; CE/OE dual-control prevents bus conflicts during DMA transfers. Use Value: Eliminates need for UV-erasable EPROM sockets; software data protection prevents accidental BIOS corruption during OS updates. |
| Telecom Line Card Parameter Tables | Embedded Instrumentation Calibration Data |
Use Scenario: Holding channel-specific gain settings, filter coefficients, and fault history logs in T1/E1 line interface units operating in extended temperature ranges. IC Role / Device Role / Timing Role: Industrial-temperature-rated (−40°C to +85°C) nonvolatile memory accessed during cold start or hot-swap initialization sequences. Use Value: 10-year data retention ensures calibration integrity across multi-year deployments without battery backup. |
Use Scenario: Storing factory-trimmed ADC/DAC offset/gain coefficients and sensor linearization tables in portable test equipment. IC Role / Device Role / Timing Role: High-reliability EEPROM interfaced directly to microcontroller GPIOs; DATA polling allows deterministic firmware startup timing. Use Value: Internal error correction extends effective endurance beyond 10,000 cycles for repeated calibration updates in lab environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar paged parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C256-25PC | 1 Mbit (128K × 8), 28-pin PDIP, 250 ns access, no page write (byte-only) | Limited to smaller firmware images; lacks 256-byte page buffer and automatic timing | Select when board space permits DIP and application requires only infrequent single-byte updates |
| MN63C256F-25PL | 1 Mbit, 28-pin PLCC, 250 ns, software-controlled page write (max 128 bytes), 100K endurance | Higher endurance but lower density; different command protocol and pinout | Choose for longer lifecycle in high-write-frequency scenarios where 1 Mbit suffices |
Compared with AT28C040-25BC, AT28C256-25PC offers simpler interface but no page write acceleration, while MN63C256F-25PL trades density for endurance and uses distinct software protocols-neither is pin-compatible, requiring PCB redesign and firmware adaptation.
Availability
AT28C040-25BC is available at Aetrix Electronics and suitable for industrial PLC configuration storage, legacy PC BIOS firmware backup, and telecom line card parameter tables requiring stable component supply across extended product lifecycles.
Supply support for AT28C040-25BC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT28C040 belongs to Atmel's parallel EEPROM product line, designed specifically for byte- and page-programmable nonvolatile storage in 8-bit embedded systems requiring JEDEC-compliant pinouts and robust data integrity features.
FAQ
What is the maximum page write size supported by the AT28C040-25BC?
The AT28C040-25BC supports page write operations of 1 to 256 bytes per internal programming cycle. All bytes written in a single page operation must reside within the same 256-byte page boundary defined by address bits A8–A18. The device latches the full page internally before initiating the 10 ms programming sequence, allowing the host bus to be released immediately after loading the last byte.
How does the AT28C040-25BC detect write completion without fixed timing delays?
The AT28C040-25BC provides two hardware-supported methods: DATA polling monitors I/O7, which outputs the complement of the last written byte until programming completes, then returns true data; Toggle Bit monitors I/O6, which toggles between 0 and 1 during programming and stabilizes upon completion. Both methods allow the host to poll asynchronously without relying on worst-case 10 ms timeouts.
Does the AT28C040-25BC require external high-voltage circuitry for programming?
No, the AT28C040-25BC performs all write and erase operations using only the standard 5V ±10% supply-no external 12V or higher voltage is needed for normal operation. The 12V requirement applies exclusively to the optional device identification area (7FF80H–7FFFFH), which is separate from main memory and unused in standard applications.
What package type is used for the AT28C040-25BC and what are its mounting requirements?
The AT28C040-25BC uses a 44-pad Ceramic Leadless Chip Carrier (LCC-44) per MIL-STD-1835 C-5. It requires reflow soldering with peak temperature ≤215°C and is not compatible with through-hole assembly. Thermal vias under the center pad are recommended for heat dissipation, and 0.1 µF ceramic decoupling capacitors must be placed within 5 mm of VCC/VSS pins.
Can the AT28C040-25BC be used as a direct replacement for older EPROMs like the 27C512?
No-the AT28C040-25BC is not a pin-compatible or functional drop-in replacement for 27C512 EPROMs. While both are 512K×8 devices, the AT28C040-25BC uses active-low CE/OE/WE controls and supports in-system electrical erasure, whereas 27C512 requires UV erasure and has different timing and control signal behavior. Firmware and hardware interface logic must be redesigned.
AT28C040-25BC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-CDIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Mbit
- Memory Organization:
- 512K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 250 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 32-CDIP
AT28C040-25BC FAQ
1.How can I place an order for AT28C040-25BC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C040-25BC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C040-25BC reliable?
The price and inventory of AT28C040-25BC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C040-25BC is usually 5 days.
3.What payment methods are accepted for AT28C040-25BC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C040-25BC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C040-25BC?
AT28C040-25BC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C040-25BC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C040-25BC?
For technical support, including AT28C040-25BC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C040-25BC requirements.
6.How does Aetrix verify that AT28C040-25BC is sourced from the original manufacturer or authorized distributors?
All AT28C040-25BC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C040-25BC meets industry standards.
7.What is the process for return or replacement of AT28C040-25BC?
All AT28C040-25BC units undergo pre-shipment inspection (PSI). If there is an issue with AT28C040-25BC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C040-25BC part is unused and in its original packaging.
Return procedure for AT28C040-25BC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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