Microchip Technology AT28C16-15SI
- Part No.:
- AT28C16-15SI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 24-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28C16-15SI.pdf
- Description:
- IC EEPROM 16KBIT PARALLEL 24SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,478
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT28C16-15SI from Atmel is a 16 Kbit (2,048 × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 150 ns read access time, 1 ms standard byte write cycle, and CMOS/TTL-compatible I/O-designed for nonvolatile storage in microprocessor-based industrial control systems requiring reliable reprogramming without external UV erasure.
For engineers reviewing the AT28C16-15SI datasheet, AT28C16-15SI pinout, AT28C16-15SI application, or AT28C16-15SI equivalent, key selection considerations include its self-timed write architecture, DATA POLLING support on I/O7, 100 µA CMOS standby current, and industrial temperature range (–40°C to +85°C) for embedded systems with long-term data retention requirements.
Technical Context
The AT28C16-15SI operates as a drop-in parallel memory replacement for SRAM in read cycles and integrates internal address/data latching and an autonomous control timer for byte writes-eliminating need for external timing logic. Its dual-line chip enable (CE) and output enable (OE) control enables flexible bus arbitration and prevents contention during mixed read/write operations.
Write protection is implemented via VCC sensing (<3.8 V inhibits write), 5 ms power-on delay, and active-level gating (WE low + CE low + OE high required). Chip Clear (12 V on OE) and Device Identification (32 extra bytes at 7E0H–7FFH with A9 = 12 V) are supported through dedicated voltage-level signaling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 16 Kbit (2,048 words × 8 bits): sufficient for firmware patch storage or configuration tables in resource-constrained controllers. |
| Read Access Time | 150 ns max: supports direct interfacing with 5–8 MHz microprocessors without wait states. |
| Byte Write Time | 1 ms typical (standard version): enables field-updatable parameters with predictable worst-case latency. |
| Standby Current | 100 µA CMOS: allows battery-backed operation in low-power monitoring nodes for >1 year on coin cell. |
| Endurance | 10⁴ write/erase cycles: suitable for logging applications with ≤100 updates/day over 3+ years. |
| Data Retention | 10 years at 85°C: validated for industrial deployments where firmware or calibration data must persist across product lifecycle. |
| Supply Voltage | 5 V ± 10%: compatible with legacy 5 V logic rails and eliminates need for dedicated EEPROM regulators. |
Pinout & Package
AT28C16-15SI is supplied in a 24-lead SOIC (24S) package per JEDEC MS-013, 0.300" wide body, with gull-wing leads and standard thermal profile compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A10 | Address Inputs | 11-bit address bus supporting full 2K-word addressing; TTL/CMOS compatible thresholds (VIL ≤ 0.8 V, VIH ≥ 2.0 V). |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; outputs drive 2.1 mA low / –400 µA high; supports DATA POLLING on I/O7 during write completion detection. |
| CE | Chip Enable | Active-low device select; when high, forces outputs to high-impedance regardless of OE/WE state-enables multi-device bus sharing. |
| OE | Output Enable | Active-low read gate; used with CE to control output assertion; also accepts 12 V for Chip Clear mode (with WE pulse). |
| WE | Write Enable | Active-low write strobe; initiates self-timed byte write; latches address/data on falling/rising edges; requires CE low and OE high for standard write. |
| GND / VCC | Power Terminals | Single 5 V supply; decoupling recommended within 1 cm due to 30 mA active current and fast 150 ns transitions. |
Key Features
| Feature | Design Value |
|---|---|
| Self-Timed Byte Write | Internal timer automates erase-before-write and timing completion-no external delay circuitry or software polling loops needed beyond I/O7 status check. |
| DATA POLLING on I/O7 | Enables real-time write completion detection: complemented data on I/O7 during write, true data upon completion-reduces average write latency vs fixed-delay polling. |
| VCC Sense Write Inhibit | Prevents partial writes during brown-out by disabling WE functionality below 3.8 V-ensures data integrity during power ramp-up or dropout events. |
| JEDEC Byte-Wide Pinout | Direct replacement for 27C16/6116 SRAMs in existing PCB layouts-no redesign required for migration to nonvolatile storage. |
| Industrial Temperature Range | Specified operation from –40°C to +85°C with full parameter compliance-validated for use in motor drives, PLC I/O modules, and outdoor metering hardware. |
Applications
| Industrial PLC Configuration Storage | Embedded Firmware Patch Buffer |
|---|---|
Use Scenario: Storing user-defined I/O mapping, scaling coefficients, and alarm thresholds in programmable logic controller backplane modules. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed during boot and runtime via 8-bit parallel bus; reads occur at system initialization and on demand. Use Value: Eliminates need for battery-backed SRAM and manual reconfiguration after power loss-retains settings for 10 years at 85°C ambient. | Use Scenario: Holding field-upgradable firmware patches in medical infusion pump controllers where safety-critical code must be verified before activation. IC Role / Device Role / Timing Role: Secondary code storage bank; patched instructions loaded into RAM during safe maintenance window using self-timed writes. Use Value: Enables secure, verified over-the-air updates without requiring full flash reprogramming-1 ms write time ensures <100 ms patch commit latency. |
| Automotive Body Control Module Calibration | Test Equipment Self-Test Data Log |
Use Scenario: Recording sensor offset corrections and actuator learning values in vehicle door module ECUs during production line calibration and dealer service. IC Role / Device Role / Timing Role: Persistent calibration memory mapped to microcontroller's external bus; written once per calibration event, read at every power-on. Use Value: Guarantees 10⁴ write cycles and 10-year retention under automotive thermal cycling (–40°C to +85°C)-meets AEC-Q100 stress requirements. | Use Scenario: Capturing pass/fail results and measurement timestamps during automated functional testing of PCB assemblies on high-volume manufacturing lines. IC Role / Device Role / Timing Role: Local log buffer interfaced directly to test controller's data bus; written sequentially after each test step with minimal CPU overhead. Use Value: 100 µA standby current enables continuous logging during idle periods; 150 ns read speed supports real-time result display without test throughput penalty. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C16-15PI | Same electrical specs and pinout; packaged in 24-lead PDIP (24P6) instead of SOIC (24S); higher 3 mA TTL standby current. | Preferred for through-hole prototyping or legacy board repair where SOIC footprint unavailable. | Select AT28C16-15PI only if PDIP mechanical fit or hand-soldering is required-SOIC offers superior thermal performance and density. |
| AT28C16E-15SI | Same package and temperature grade; enhanced endurance (10⁵ cycles) and faster 200 µs write time; otherwise identical pinout and interface behavior. | Suitable for high-frequency update scenarios like dynamic calibration or telemetry logging with >100 daily writes. | Choose AT28C16E-15SI when write endurance or latency is critical-standard AT28C16-15SI remains optimal for infrequent configuration storage. |
Compared with AT28C16-15PI and AT28C16E-15SI, the AT28C16-15SI delivers the best balance of industrial reliability, SOIC packaging efficiency, and cost-effectiveness for applications requiring ≤10⁴ writes over product lifetime-without sacrificing 150 ns read performance or JEDEC compatibility.
Availability
AT28C16-15SI is available at Aetrix Electronics and suitable for industrial automation, medical device firmware storage, and automotive calibration applications requiring stable component supply, long-term obsolescence management, and guaranteed traceability.
Supply support for AT28C16-15SI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor innovator known for nonvolatile memory, microcontrollers, and secure authentication ICs-founded in 1984 and headquartered in San Jose, CA.
The AT28C16 product line was designed specifically for seamless integration into 5 V microprocessor systems needing byte-erasable, pin-compatible EEPROM alternatives to EPROM and battery-SRAM-with emphasis on industrial-grade reliability and zero-external-component write timing.
FAQ
What is the maximum operating temperature range for the AT28C16-15SI?
The AT28C16-15SI is rated for industrial temperature operation from –40°C to +85°C, with all electrical specifications-including 150 ns read access time, 1 ms write time, and 100 µA standby current-guaranteed across this full range. This makes the AT28C16-15SI suitable for deployment in harsh environments such as factory floor controllers, outdoor metering equipment, and under-hood automotive modules where ambient thermal stress is significant.
Does the AT28C16-15SI require external high-voltage circuitry for programming?
No, the AT28C16-15SI does not require external high-voltage programming circuitry for standard byte writes-its self-timed architecture uses only 5 V for normal operation. However, Chip Clear (12 V applied to OE) and Device Identification memory access (12 V on A9) do require a controlled 12.0 V ± 0.5 V source, which must be isolated from the main 5 V rail and activated only during specific maintenance or provisioning sequences-not during routine firmware updates.
How is write completion detected on the AT28C16-15SI?
Write completion on the AT28C16-15SI is detected via DATA POLLING on I/O7: during an active byte write, reading the target address returns the complement of the written data on I/O7 (other outputs are indeterminate); when the write finishes, true data appears on all outputs including I/O7. This eliminates fixed delays and allows the host microprocessor to resume operation immediately upon confirmation-reducing average latency versus timeout-based polling methods.
Can the AT28C16-15SI be used as a direct replacement for a 6116 SRAM in an existing design?
Yes, the AT28C16-15SI features JEDEC-approved byte-wide pinout and TTL/CMOS-compatible inputs/outputs, enabling direct substitution for 2K × 8 SRAMs like the 6116 in many cases-provided the system accommodates the 1 ms write cycle (vs instantaneous SRAM write) and implements DATA POLLING or hardware ready signaling. No PCB layout change is needed, but firmware must manage write timing and verify completion before subsequent accesses.
What is the endurance rating and data retention specification of the AT28C16-15SI?
The AT28C16-15SI guarantees 10⁴ write/erase cycles and 10 years of data retention at +85°C ambient temperature. These values are production-tested and specified in the official Atmel datasheet Rev. 0540B–10/98. The device achieves this through Atmel's proprietary nonvolatile CMOS process with internal error correction, making the AT28C16-15SI appropriate for applications where configuration or calibration data must remain intact across extended product lifecycles without battery backup.
AT28C16-15SI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 24-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 16Kbit
- Memory Organization:
- 2K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 1ms
- Access Time:
- 150 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 24-SOIC
AT28C16-15SI FAQ
1.How can I place an order for AT28C16-15SI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C16-15SI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C16-15SI reliable?
The price and inventory of AT28C16-15SI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C16-15SI is usually 5 days.
3.What payment methods are accepted for AT28C16-15SI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C16-15SI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C16-15SI?
AT28C16-15SI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C16-15SI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C16-15SI?
For technical support, including AT28C16-15SI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C16-15SI requirements.
6.How does Aetrix verify that AT28C16-15SI is sourced from the original manufacturer or authorized distributors?
All AT28C16-15SI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C16-15SI meets industry standards.
7.What is the process for return or replacement of AT28C16-15SI?
All AT28C16-15SI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C16-15SI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C16-15SI part is unused and in its original packaging.
Return procedure for AT28C16-15SI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28C16-15SI Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

