Microchip Technology AT28C256-20UM/883
- Part No.:
- AT28C256-20UM/883
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-BCPGA
- Datasheet:
-
AT28C256-20UM/883.pdf
- Description:
- IC EEPROM 256KBIT PAR 28CPGA
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT28C256-20UM/883 from Microchip Technology is a military-grade 256-Kbit paged parallel EEPROM organized as 32,768 × 8, featuring 200 ns read access time, 10 ms maximum page write cycle time, and single 5V ±10% supply operation. It supports hardware and software data protection, DATA polling for write completion detection, and operates across −55°C to +125°C for avionics and defense system firmware storage.
For engineers reviewing the AT28C256-20UM/883 datasheet, AT28C256-20UM/883 pinout, AT28C256-20UM/883 application, or AT28C256-20UM/883 equivalent, this page delivers verified military-spec electrical parameters, JEDEC-compliant 30-pin PGA pin mapping, endurance (10,000 cycles), data retention (10 years), and CMOS/TTL-compatible I/O behavior under MIL-STD-883 conditions.
Technical Context
The AT28C256-20UM/883 implements a paged write architecture with an internal 64-byte latch, enabling 1–64 byte writes within a single page defined by A6–A14. Its dual-line chip enable (CE) and output enable (OE) control allows bus contention avoidance in shared-memory systems.
It integrates VCC sense circuitry (write inhibit below 3.8 V), 5 ms power-on delay, noise filtering on WE/CE inputs (<15 ns rejection), and optional software data protection via three-byte command sequences to address inadvertent writes during power transitions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory capacity | 256 Kbit (32,768 × 8) - supports full firmware image storage for microcontroller boot loaders |
| Read access time | 200 ns max - enables direct replacement of SRAM in legacy MIL-STD-1553 or 80C86-based systems without timing redesign |
| Page write cycle time | 10 ms max - defines worst-case latency for field-updatable configuration blocks in flight control computers |
| Endurance | 10,000 write/erase cycles - validated for mission-critical reprogramming in ground support equipment |
| Data retention | 10 years at +125°C - meets long-term archival requirements for weapon system calibration tables |
| Supply voltage | 5V ±10% - compatible with legacy MIL-STD-704A aircraft power buses without regulation overhead |
| Operating temperature | −55°C to +125°C - qualified per MIL-STD-883 Method 1010 for high-reliability embedded platforms |
Pinout & Package
AT28C256-20UM/883 is supplied in a 30-pin Ceramic Pin Grid Array (PGA) package compliant with MIL-STD-1835 U-configuration, with pins arranged in two concentric rows and center index mark. The package provides hermetic sealing and thermal stability for extended deployment in harsh environments.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address inputs | 15-bit address bus supporting full 32K-word addressing; A6–A14 define page boundaries for 64-byte writes |
| I/O0–I/O7 | Bidirectional data bus | CMOS/TTL-compatible 8-bit parallel interface; I/O7 used for DATA polling, I/O6 for toggle-bit status monitoring |
| CE | Chip Enable | Active-low device selection; must be low with OE low and WE high for read access; initiates write when pulsed low |
| OE | Output Enable | Active-low output gating; controls data bus drive; high during write operations to prevent contention |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; combined with CE for robust write initiation |
| VCC | Power supply | +5V ±10% primary supply; internal VCC sense disables writes below 3.8V to prevent corruption during brownout |
| GND | Ground reference | Signal and power return path; decoupling required per MIL-STD-1553B layout guidelines |
| A9 (12V) | Device ID enable | When raised to 12V ±0.5V, unlocks 64-byte identification EEPROM region (7FC0H–7FFFH) for traceability |
Key Features
| Feature | Design Value |
|---|---|
| Hardware data protection | VCC sense + 5 ms power-on delay + noise filtering ensures zero inadvertent writes during aircraft engine start transients |
| Software data protection (SDP) | Three-byte command sequence (AAh/55h/A0h) enables/disables write lock without hardware modification |
| DATA Polling on I/O7 | Enables real-time write completion detection without external timers or interrupts in safety-critical flight software |
| Toggle Bit on I/O6 | Provides asynchronous write status feedback compatible with legacy 8086/80C86 interrupt-driven polling loops |
| JEDEC byte-wide pinout | Ensures drop-in compatibility with existing PCB layouts designed for 27C256 EPROMs or 62256 SRAMs |
Applications
| Avionics Boot Memory | Mission Computer Configuration Storage |
|---|---|
|
Use Scenario: Storing boot firmware and self-test routines for MIL-STD-1553B bus controllers in fighter jet mission computers. IC Role / Device Role / Timing Role: Nonvolatile program memory providing deterministic 200 ns read access during cold-start initialization. Use Value: Eliminates need for external wait-state generators while maintaining compliance with DO-254 Level A timing budgets. |
Use Scenario: Holding flight-critical configuration tables (e.g., sensor calibration offsets, control law coefficients) updated between sorties. IC Role / Device Role / Timing Role: Field-programmable parameter store with 10,000-cycle endurance and 10-year data retention at +125°C. Use Value: Enables depot-level reprogramming without component replacement, reducing logistics footprint and lifecycle cost. |
| Tactical Radio Firmware Update | Guidance System Checksum Repository |
|
Use Scenario: Secure storage of encrypted firmware images for software-defined radios operating in contested EM environments. IC Role / Device Role / Timing Role: Protected memory block accessed only after SDP unlock sequence, preventing tampering during power cycling. Use Value: Hardware-enforced write inhibition complements cryptographic authentication, satisfying NSA Type 1 encryption key management requirements. |
Use Scenario: Archiving SHA-256 checksums of guidance algorithm binaries for post-mission integrity verification. IC Role / Device Role / Timing Role: Tamper-resistant nonvolatile storage with hermetically sealed 30-pin PGA package resistant to humidity and thermal shock. Use Value: Provides auditable chain-of-custody evidence for missile system certification under MIL-HDBK-217F reliability standards. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar paged parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C256-20JM/883 | 32-lead CERDIP package; identical electrical specs but different thermal resistance and mounting method | Suitable for through-hole board assembly with wave soldering; lacks PGA's vibration resistance in high-G launch environments | Select when legacy PCB layout uses DIP footprints or when thermal dissipation via heatsink contact is required |
| AT28C256-25UM/883 | 250 ns read access time; otherwise identical pinout, endurance, and protection features | Acceptable where system clock rate permits longer memory wait states; lower power consumption during active reads | Select when optimizing for worst-case power budget in battery-backed subsystems without compromising MIL-STD-883 qualification |
Compared with AT28C256-20UM/883, the JM variant offers mechanical compatibility with legacy DIP sockets but reduced shock survivability, while the 25UM variant trades 50 ns read speed for lower ICC in power-constrained telemetry modules - both retain full software data protection and page-write functionality.
Availability
AT28C256-20UM/883 is available at Aetrix Electronics and suitable for avionics boot memory, mission computer configuration storage, and tactical radio firmware update applications requiring stable component supply under extended military temperature and radiation profiles.
Supply support for AT28C256-20UM/883 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with a strong heritage in aerospace and defense components acquired from Atmel.
The AT28C256 product line was developed for high-reliability, field-upgradable nonvolatile memory in military computing systems, emphasizing radiation-tolerant design, extended temperature operation, and MIL-STD-883 qualification.
FAQ
What is the maximum page write cycle time for AT28C256-20UM/883?
The maximum page write cycle time for AT28C256-20UM/883 is 10 ms, as specified in the AC Write Characteristics table under tWC. This value applies across the full −55°C to +125°C operating range and is guaranteed under MIL-STD-883 test conditions. The AT28C256-20UM/883 achieves this using an internal control timer that automatically manages programming voltage and timing without external intervention.
Does AT28C256-20UM/883 support software data protection, and how is it enabled?
Yes, AT28C256-20UM/883 supports software data protection (SDP) via a three-byte command sequence: write AAh to address 5555h, 55h to 2AAAh, then A0h to 5555h. After this sequence, all subsequent writes require repetition of the same sequence. The AT28C256-20UM/883 ships with SDP disabled, and the feature remains active across power cycles until explicitly disabled using the 5-byte disable algorithm.
What package type is used for AT28C256-20UM/883, and what does the "/883" suffix indicate?
AT28C256-20UM/883 uses a 30-pin Ceramic Pin Grid Array (PGA) package, denoted by the "UM" suffix. The "/883" suffix indicates full compliance with MIL-STD-883, including screening for mechanical shock, thermal cycling, and burn-in testing per Method 1010. This qualification ensures suitability for Class H (−55°C to +125°C) military applications.
How is write completion detected on AT28C256-20UM/883?
Write completion on AT28C256-20UM/883 is detected using either DATA Polling on I/O7 (complement of written data appears until completion) or Toggle Bit behavior on I/O6 (toggling stops when write finishes). Both methods operate asynchronously and do not require external clocks. The AT28C256-20UM/883 guarantees these functions across its full military temperature range.
What is the endurance rating and data retention specification for AT28C256-20UM/883?
The AT28C256-20UM/883 is rated for 10,000 write/erase cycles and guarantees 10 years of data retention at +125°C, as confirmed in the DC Characteristics section. These values are validated under MIL-STD-883 Method 1008 and 1009 testing protocols. The AT28C256-20UM/883 achieves this using Microchip's advanced nonvolatile CMOS process with error correction for extended endurance.
AT28C256-20UM/883 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-BCPGA
- Packaging:
- Box
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 200 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 28-CPGA (13.97x16.51)
AT28C256-20UM/883 FAQ
1.How can I place an order for AT28C256-20UM/883 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C256-20UM/883 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C256-20UM/883 reliable?
The price and inventory of AT28C256-20UM/883 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C256-20UM/883 is usually 5 days.
3.What payment methods are accepted for AT28C256-20UM/883?
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4.How is shipping managed for AT28C256-20UM/883?
AT28C256-20UM/883 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C256-20UM/883 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C256-20UM/883?
For technical support, including AT28C256-20UM/883 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C256-20UM/883 requirements.
6.How does Aetrix verify that AT28C256-20UM/883 is sourced from the original manufacturer or authorized distributors?
All AT28C256-20UM/883 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C256-20UM/883 meets industry standards.
7.What is the process for return or replacement of AT28C256-20UM/883?
All AT28C256-20UM/883 units undergo pre-shipment inspection (PSI). If there is an issue with AT28C256-20UM/883, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C256-20UM/883 part is unused and in its original packaging.
Return procedure for AT28C256-20UM/883:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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