Microchip Technology AT28C256-90JI

Overview

AT28C256-90JI from Microchip Technology is a military-grade 256-Kbit (32,768 × 8) paged parallel EEPROM with 150 ns read access time, 3 ms or 10 ms page write cycle time, and single 5V ±10% supply operation. It features internal 64-byte page latching, DATA Polling via I/O7, and hardware/software data protection-used in avionics control modules for nonvolatile configuration storage requiring radiation-tolerant, long-retention memory.

For engineers reviewing the AT28C256-90JI datasheet, AT28C256-90JI pinout, AT28C256-90JI application, or AT28C256-90JI equivalent, key selection criteria include JEDEC byte-wide pin compatibility, -55°C to +125°C military temperature range, 10,000–100,000 write endurance, CMOS/TTL I/O compatibility, and support for both byte and page write modes without external timing components.

Technical Context

The AT28C256-90JI implements a static RAM-compatible parallel interface with dual-line chip enable (CE) and output enable (OE) control, enabling bus contention avoidance in multi-master systems. Its internal architecture includes a 64-byte page register, address/data latches, and an autonomous control timer that manages write completion without host intervention.

Write verification is supported via two independent methods: DATA Polling on I/O7 (complement-to-data during write, true data upon completion) and Toggle Bit behavior on I/O6 (toggling until write ends). Hardware protection includes VCC sense (<3.8 V inhibits writes), 5 ms power-on delay, noise filtering (<15 ns pulses ignored), and write-inhibit logic tied to CE/OE/WE states.

Key Specifications

Pinout & Package

AT28C256-90JI is supplied in a 32-lead CERDIP (Ceramic Dual In-line Package) with JEDEC-standard byte-wide pinout. Pin 1 is index corner; pins 1 and 17 are "Don't Connect" (DC) per CLCC variant documentation and confirmed across all 32-lead packages. The device uses a 15-bit address bus (A0–A14), 8-bit bidirectional data bus (I/O0–I/O7), and three control signals (CE, OE, WE).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar paged parallel EEPROM applications.

Compared with AT28C256-90JI, AT28C256-15JI offers identical functionality with equivalent military reliability, while MX28F256J3F trades security and speed for legacy PLCC compatibility-making AT28C256-90JI optimal for new designs demanding robust write protection and sub-200 ns timing.

Availability

AT28C256-90JI is available at Aetrix Electronics and suitable for avionics control modules, tactical radio firmware vaults, spacecraft telemetry loggers, armored vehicle diagnostic ECUs, and missile guidance subsystems requiring stable component supply across extended production lifecycles.

Supply support for AT28C256-90JI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions, with ISO 9001-certified manufacturing and MIL-PRF-38535 QML certification for high-reliability products.

The AT28C256 product line was developed to deliver radiation-tolerant, long-retention EEPROMs for defense and aerospace systems where data integrity under extreme thermal, voltage, and radiation stress is non-negotiable.

FAQ

What is the maximum page write size supported by the AT28C256-90JI?

The AT28C256-90JI supports a maximum page write size of 64 bytes. This is enabled by its internal 64-byte page register, which latches address and data during a single write initiation. Each successive byte must be loaded within 150 µs (tBLC) of the prior byte, and all addresses must reside on the same page defined by A6–A14. The AT28C256-90JI does not support larger burst writes beyond this limit.

Does the AT28C256-90JI require a 12 V supply for any operation?

The AT28C256-90JI operates exclusively from a single 5V ±10% supply for normal read/write operations. A 12 V ±0.5 V supply is required only for optional Chip Erase mode (applied to OE pin) and for programming the 64-byte device identification area (applied to A9 pin). These are infrequent, factory-level functions-not needed for standard firmware updates or configuration storage using the AT28C256-90JI.

How does DATA Polling work on the AT28C256-90JI during a write cycle?

During a write cycle, reading the last written byte from the AT28C256-90JI causes I/O7 to output the complement of the written data. Once the internal write completes, I/O7 returns to true data. This allows firmware to poll I/O7 in a tight loop without timers or interrupts. The AT28C256-90JI guarantees this behavior across its full military temperature range and is electrically characterized per Table 6-5 in DS20006344A.

Is the AT28C256-90JI pin-compatible with standard 27C256 EPROMs?

Yes-the AT28C256-90JI uses JEDEC-approved byte-wide pinout matching 27C256 EPROMs in 28-pin DIP and 32-pin CERDIP packages. Address (A0–A14), data (I/O0–I/O7), and control pins (CE, OE, WE) align directly. However, AT28C256-90JI replaces UV-erasable EPROM functionality with in-system electrical erasure and requires no windowed package or UV exposure equipment.

What endurance rating applies to the AT28C256-90JI based on its part number suffix?

The "90" in AT28C256-90JI indicates 150 ns access time (not endurance). Endurance is marked separately: blank = 10,000 cycles, "E" = 100,000 cycles. Per DS20006344A-page 21, AT28C256-90JI carries no "E" suffix and therefore provides 10,000 write/erase cycles minimum-validated per MIL-STD-883 test method 1012.2 at 125°C.