Microchip Technology AT28C256E-15TU-T
- Part No.:
- AT28C256E-15TU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-TSSOP (0.465", 11.80mm Width)
- Datasheet:
-
AT28C256E-15TU-T.pdf
- Description:
- IC EEPROM 256KBIT PAR 28TSOP
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT28C256E-15TU-T from Microchip Technology is an industrial-grade 256-Kbit paged parallel EEPROM organized as 32,768 × 8, featuring 150 ns read access time, 64-byte page write capability, and single 5V ±10% supply operation. It supports DATA polling and toggle-bit write completion detection and is used in firmware storage, configuration retention, and boot code backup in embedded controllers and industrial PLCs.
For engineers reviewing the AT28C256E-15TU-T datasheet, AT28C256E-15TU-T pinout, AT28C256E-15TU-T application, or AT28C256E-15TU-T equivalent, key selection considerations include JEDEC byte-wide pin compatibility, 100,000-cycle endurance, software/hardware data protection, industrial temperature range (–40°C to +85°C), and PLCC-32 packaging with no-connect pins requiring proper PCB routing.
Technical Context
The AT28C256E-15TU-T implements a CMOS-based paged EEPROM architecture with internal address/data latches for up to 64 bytes per write cycle and an autonomous control timer managing write timing. Its dual-line chip enable (CE) and output enable (OE) logic enables bus contention avoidance in shared-memory systems.
It supports three write modes-byte, page, and optional chip erase-with hardware VCC-sense and power-on delay preventing inadvertent writes during power transitions. Software data protection (SDP) is enabled via a 3-byte command sequence at fixed addresses (5555H/2AAAH/5555H), and device identification uses dedicated 64-byte memory space accessible at 7FC0H–7FFFH with A9 = 12V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 256 Kbit (32,768 × 8); sufficient for storing full bootloader images or multi-parameter configuration sets in microcontroller-based systems |
| Read Access Time | 150 ns max; enables direct replacement of SRAM in legacy 8-bit bus systems without timing redesign |
| Page Write Cycle | 10 ms max; allows efficient bulk updates of calibration tables or firmware patches with minimal system stall time |
| Endurance | 100,000 write cycles; supports field-upgradable devices requiring frequent reprogramming over 10+ years |
| Data Retention | 10 years at +85°C; ensures long-term reliability in unattended industrial monitoring equipment |
| Supply Voltage | 5V ±10%; compatible with standard TTL/CMOS logic rails and eliminates need for auxiliary voltage regulators |
| Operating Temperature | –40°C to +85°C; qualified for deployment in factory automation, motor drives, and outdoor metering hardware |
Pinout & Package
AT28C256E-15TU-T is supplied in a 32-lead Plastic Leaded Chip Carrier (PLCC) package with JEDEC-standard byte-wide pinout. Pin 1 is marked by a corner notch; pins 12 and 26 are No Connect (NC), and pins 1 and 17 are Don't Connect (DC) - these must remain unconnected on PCB layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address Inputs | 15-bit address bus supporting full 32K-word addressing; A6–A14 define page boundaries for 64-byte page writes |
| I/O0–I/O7 | Bidirectional Data Bus | CMOS/TTL-compatible 8-bit data path; I/O7 provides DATA polling feedback, I/O6 toggles during write cycles |
| CE | Chip Enable | Active-low global select; must be low with OE low and WE high for read access; initiates write when pulsed low with OE high |
| OE | Output Enable | Active-low output gate; controls data bus drive; high during write operations to avoid contention |
| WE | Write Enable | Active-low write strobe; falling edge latches address and data; used with CE for byte/page write initiation |
| VCC | Power Supply | +5V ±10% supply; internal VCC sense disables writes below ~3.8V to prevent corruption during brownout |
| GND | Ground Reference | Signal and power return; decoupling capacitor required within 10 mm of VCC pin for stable read/write margins |
Key Features
| Feature | Design Value |
|---|---|
| 64-byte Page Write | Reduces firmware update time by >90% vs. byte-write mode; eliminates host-side timing overhead for sequential writes |
| DATA Polling (I/O7) | Enables real-time write status monitoring without external wait-state logic or fixed delays in microcontroller firmware |
| Toggle Bit Detection (I/O6) | Provides asynchronous write-complete signal usable with interrupt-driven architectures or logic-state sampling |
| Software Data Protection | Prevents accidental writes via 3-byte unlock sequence; retains protection across power cycles and supports selective unprotected writes |
| Hardware Write Inhibit | VCC sensing, 5 ms power-on delay, and noise filtering (<15 ns) eliminate need for external reset supervisors or RC timing circuits |
Applications
| Industrial PLC Configuration Storage | Firmware Bootloader Backup |
|---|---|
Use Scenario: Storing user-defined I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in harsh factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration register providing deterministic startup behavior and field-modifiable settings without battery backup. Use Value: 100,000-cycle endurance and 10-year data retention ensure reliable parameter persistence across 15+ years of continuous operation. | Use Scenario: Holding a redundant copy of primary bootloader code in microcontroller-based edge gateways, enabling recovery after failed OTA updates. IC Role / Device Role / Timing Role: Standalone parallel EEPROM accessed directly via MCU's external memory interface during cold boot before main flash initialization. Use Value: 150 ns read access matches typical 8-MHz bus timing, eliminating wait states and ensuring sub-100 ms failover execution. |
| Medical Device Calibration Data | Automotive Body Control Module Settings |
Use Scenario: Archiving sensor calibration coefficients, linearity corrections, and date-stamped diagnostic logs in portable ultrasound and infusion pump systems. IC Role / Device Role / Timing Role: Secure, tamper-resistant nonvolatile memory with software/hardware write protection guarding against unintended parameter overwrite. Use Value: Dual protection mechanisms meet IEC 62304 Class C software safety requirements for critical medical data integrity. | Use Scenario: Retaining seat/mirror position presets, lighting profiles, and door lock configurations in automotive body control units (BCUs). IC Role / Device Role / Timing Role: Industrial-temperature EEPROM interfaced to 8-bit MCU via parallel bus, surviving repeated thermal cycling and ESD events. Use Value: –40°C to +85°C operation and 200 µA standby current support always-on functionality with <1 µW quiescent power draw. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar paged parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C256-15PU | 28-pin PDIP package; identical electrical specs and timing but lacks DC/NC pins and uses different marking format | Suitable for through-hole prototyping or legacy board rework where PLCC socketing is unavailable | Select when mechanical fit or hand-soldering constraints override surface-mount preference |
| AT28C256-15SU | 28-pin SOIC package; same core functionality but smaller footprint and no NC/DC pins | Preferred for space-constrained consumer electronics or cost-sensitive production where PLCC tooling is not available | Choose for automated SMT assembly and reduced board area; verify trace impedance for 150 ns timing compliance |
Compared with AT28C256E-15TU-T, the PDIP (AT28C256-15PU) offers easier manual handling but higher parasitic inductance, while the SOIC (AT28C256-15SU) reduces size and weight at the expense of thermal dissipation margin in high-ambient environments.
Availability
AT28C256E-15TU-T is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, automotive body electronics, and embedded firmware backup requiring stable component supply across extended product lifecycles.
Supply support for AT28C256E-15TU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions, with ISO 9001-certified manufacturing and global distribution.
The AT28C256 product line delivers high-reliability parallel EEPROMs optimized for industrial and automotive applications demanding robust data retention, fast read access, and secure write protection without external support circuitry.
FAQ
What is the maximum page write size supported by the AT28C256E-15TU-T?
The AT28C256E-15TU-T supports a maximum page write size of 64 bytes. This is implemented via an internal 64-byte page register that latches address and data simultaneously. Each byte in the page must be loaded within 150 µs of the prior byte (tBLC), and all addresses must reside on the same page defined by A6–A14. The AT28C256E-15TU-T does not support larger burst writes or sector-level erases.
Does the AT28C256E-15TU-T require a 12V supply for any operation?
The AT28C256E-15TU-T operates from a single 5V ±10% supply for normal read/write functions. A 12V ±0.5V supply on A9 is required only for accessing the optional 64-byte device identification memory (7FC0H–7FFFH) or executing the software chip erase command. These 12V operations are strictly optional and not needed for standard configuration or firmware storage use cases.
How does software data protection work on the AT28C256E-15TU-T?
Software data protection (SDP) on the AT28C256E-15TU-T is enabled by writing three specific data bytes (AAH, 55H, A0H) to three fixed addresses (5555H, 2AAAH, 5555H). Once activated, all subsequent writes require repeating this sequence before data. SDP persists through power cycles and is disabled only by a separate 5-byte disable sequence. The AT28C256E-15TU-T ships with SDP disabled by default.
What is the difference between the 'E' and 'F' suffixes in AT28C256 part numbers?
The 'E' suffix in AT28C256E-15TU-T denotes Extended endurance (100,000 write cycles), while the 'F' suffix (e.g., AT28C256F-15TU-T) indicates Fast write timing (3 ms page write cycle vs. 10 ms for 'E'). Both share identical 150 ns read access, package, and pinout. The AT28C256E-15TU-T prioritizes longevity over speed, making it optimal for infrequent but mission-critical updates.
Can the AT28C256E-15TU-T be used as a direct replacement for older AT28C256 variants?
Yes - the AT28C256E-15TU-T maintains full pin, timing, and functional compatibility with earlier AT28C256 versions (e.g., AT28C256-15PU/SU), including identical JEDEC byte-wide pinout, 150 ns read access, and software command sequences. Differences are limited to endurance rating ('E' = 100K cycles) and package (PLCC-32), so PCB layout and firmware require no modification when upgrading from compatible variants.
AT28C256E-15TU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-TSSOP (0.465", 11.80mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 150 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSOP
AT28C256E-15TU-T FAQ
1.How can I place an order for AT28C256E-15TU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C256E-15TU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C256E-15TU-T reliable?
The price and inventory of AT28C256E-15TU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C256E-15TU-T is usually 5 days.
3.What payment methods are accepted for AT28C256E-15TU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C256E-15TU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C256E-15TU-T?
AT28C256E-15TU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C256E-15TU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C256E-15TU-T?
For technical support, including AT28C256E-15TU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C256E-15TU-T requirements.
6.How does Aetrix verify that AT28C256E-15TU-T is sourced from the original manufacturer or authorized distributors?
All AT28C256E-15TU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C256E-15TU-T meets industry standards.
7.What is the process for return or replacement of AT28C256E-15TU-T?
All AT28C256E-15TU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT28C256E-15TU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C256E-15TU-T part is unused and in its original packaging.
Return procedure for AT28C256E-15TU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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