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Microchip Technology AT28C64-12JI
- Part No.:
- AT28C64-12JI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT28C64-12JI.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 32PLCC
- Quantity:
- Payment:
- Shipping:
Inventory:3,438
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Product details
Overview
AT28C64-12JI from Atmel is an 8K × 8-bit parallel EEPROM with 120 ns read access time, 1 ms byte write cycle, and industrial temperature range (−40°C to +85°C), designed for nonvolatile storage in microprocessor-based systems requiring direct bus interfacing without external timing logic.
For engineers reviewing the AT28C64-12JI datasheet, AT28C64-12JI pinout, AT28C64-12JI application, or AT28C64-12JI equivalent, this device supports READY/BUSY polling and DATA polling for write completion detection, operates at 5V ±10%, and features JEDEC-standard byte-wide pinout compatible with SRAM-like read/write cycles.
Technical Context
The AT28C64-12JI implements a self-timed byte write architecture with internal address/data latching and automatic clear-before-write logic, eliminating need for external write timers. Its RDY/BUSY open-drain output and I/O7 data polling enable real-time write status monitoring during microprocessor bus operations.
It uses CMOS process technology to achieve 30 mA active current and 100 µA standby current while maintaining TTL/CMOS input/output compatibility. The device supports chip erase via 12 V on OE and includes 32 bytes of user-accessible identification memory at addresses 1FE0H–1FFFH.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 8,192 words × 8 bits (64 Kbit); provides full byte-addressable nonvolatile storage for firmware or configuration data. |
| Read Access Time | 120 ns max; enables direct replacement of SRAM in legacy 5 MHz bus systems without wait-state insertion. |
| Byte Write Time | 1 ms typical; self-timed cycle frees address/data bus after initiation, supporting concurrent CPU operations. |
| Supply Voltage | 5 V ±10%; compatible with standard TTL/CMOS logic rails and eliminates need for auxiliary voltage regulators. |
| Operating Temperature | −40°C to +85°C; qualified for industrial control, instrumentation, and automotive under-hood modules. |
| Endurance | 10,000 write/erase cycles; sufficient for infrequent configuration updates or calibration storage in field-deployed equipment. |
| Data Retention | 10 years at +85°C; ensures long-term reliability of stored parameters without battery backup. |
Pinout & Package
AT28C64-12JI is packaged in a 32-lead Plastic J-Leaded Chip Carrier (PLCC), JEDEC MS-016 AE compliant, with pins 1 and 17 designated as "Don't Connect" per datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus for selecting one of 8,192 memory locations; TTL/CMOS compatible. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface for reading stored data or writing new bytes; high-impedance when disabled. |
| CE | Chip Enable | Active-low chip select; must be low for read/write access; controls power-down mode when high. |
| OE | Output Enable | Active-low output gate; enables data output during read; inhibits writes when low. |
| WE | Write Enable | Active-low write strobe; initiates self-timed byte write on falling edge; latches address/data internally. |
| RDY/BUSY | Open-Drain Status Output | Pulled low during write cycle; released high at completion; supports wired-OR multi-device status lines. |
| VCC, GND | Power Supply | 5 V supply and ground; decoupling required within 1 inch for stable 120 ns read timing. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed byte write | Eliminates external timing circuitry; internal control timer handles clear-and-write sequence automatically. |
| READY/BUSY + DATA polling | Dual write-completion detection methods allow flexible integration with any microprocessor bus protocol. |
| Write protection logic | VCC sense (disable below 3.8 V), 5 ms power-on delay, and triple signal inhibit (CE/OE/WE) prevent accidental writes. |
| JEDIC-standard pinout | Ensures drop-in compatibility with existing SRAM-based PCB layouts and memory controllers. |
| 32-byte ID memory | User-accessible EEPROM space at 1FE0H–1FFFH for serialization, calibration constants, or firmware version tracking. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping tables and operational parameters in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed via 8-bit parallel bus during boot and runtime reconfiguration. Use Value: 10-year data retention and −40°C to +85°C operation ensure parameter integrity across extended maintenance intervals and thermal cycling. |
Use Scenario: Holding sensor calibration coefficients and safety-critical setup values in portable diagnostic instruments. IC Role / Device Role / Timing Role: Byte-writable, tamper-resistant memory for field-updatable calibration data accessed during device power-up. Use Value: Built-in write protection and VCC-sense inhibit prevent corruption during brown-out conditions common in battery-powered medical devices. |
| Automotive ECU Parameter Tables | Telecom Line Card Firmware Patch Storage |
Use Scenario: Storing engine tuning maps and emission control parameters in engine control units operating under under-hood thermal stress. IC Role / Device Role / Timing Role: Industrial-grade EEPROM interfaced directly to MCU data bus for fast read access during real-time control loops. Use Value: 120 ns read access enables zero-wait-state execution of lookup tables critical for closed-loop fuel injection timing. |
Use Scenario: Storing hot-swappable firmware patches in carrier-grade line cards requiring field updates without system reboot. IC Role / Device Role / Timing Role: Parallel EEPROM used as secondary boot memory for patch loading via host processor DMA transfers. Use Value: RDY/BUSY open-drain output allows centralized write-status monitoring across multiple line cards sharing a common control bus. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-12JI | Enhanced revision with improved data retention (20 years) and tighter tACC tolerance (120 ns guaranteed). | Same pinout and timing; preferred for new designs requiring extended lifecycle support. | Select AT28C64B-12JI if long-term obsolescence mitigation and higher reliability margin are required. |
| MX28LV640BTC-12G | 64 Kbit parallel EEPROM with 120 ns access but requires 12 V for chip erase; no RDY/BUSY pin. | Lacks hardware busy signaling; relies solely on DATA polling, increasing software overhead. | Choose MX28LV640BTC-12G only when RDY/BUSY is unused and board layout accommodates different pin 1 function. |
Compared with AT28C64-12JI, the AT28C64B-12JI offers longer data retention and tighter AC specs without layout changes, while MX28LV640BTC-12G sacrifices RDY/BUSY signaling for lower cost-making AT28C64-12JI optimal for designs needing deterministic hardware status feedback and industrial temperature assurance.
Availability
AT28C64-12JI is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, and automotive electronic control units requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for AT28C64-12JI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT28C64 product line was designed for direct SRAM-drop-in replacement in legacy 8-bit and 16-bit microprocessor systems requiring reliable, low-power, parallel-access nonvolatile memory with industrial temperature support.
FAQ
What is the maximum operating temperature range for the AT28C64-12JI?
The AT28C64-12JI is rated for industrial temperature operation from −40°C to +85°C, verified per datasheet Section "DC and AC Operating Range". This specification applies specifically to the -JI suffix variant and is validated across all AC and DC parameters including tACC, ICC, and ISB1. The AT28C64-12JI maintains full functionality-including 120 ns read access and 1 ms write timing-within this full range.
Does the AT28C64-12JI require external high-voltage circuitry for programming?
No, the AT28C64-12JI performs all write and erase operations using only a standard 5 V supply. High-voltage (12 V) is required only for optional chip erase or device identification memory access-not for normal byte write cycles. The self-timed write architecture and internal charge pump eliminate need for external HV generators, simplifying system design around the AT28C64-12JI.
How does write protection work on the AT28C64-12JI?
The AT28C64-12JI implements three independent hardware write protection mechanisms: (1) VCC sense disables writes if supply drops below ~3.8 V; (2) 5 ms internal power-on delay prevents writes during power ramp-up; and (3) simultaneous assertion of CE high, OE low, or WE high blocks all write attempts. These protections operate autonomously and do not rely on firmware, ensuring robustness for the AT28C64-12JI in noisy or unstable power environments.
Can the AT28C64-12JI be used as a direct replacement for SRAM in existing designs?
Yes-the AT28C64-12JI uses JEDEC-approved byte-wide pinout and supports identical read/write control sequences as standard SRAM: CE and OE low with WE high for reads; CE low and WE low with OE high for writes. Its 120 ns read timing matches many 5 MHz bus SRAMs, and the AT28C64-12JI requires no external timing components, enabling true drop-in replacement in properly decoupled layouts.
What is the purpose of the RDY/BUSY pin on the AT28C64-12JI?
The RDY/BUSY pin (Pin 1) on the AT28C64-12JI is an open-drain output that actively pulls low during byte write or chip erase cycles and releases high-Z at completion. It enables hardware-driven wait-state generation or interrupt-driven polling, reducing CPU overhead versus software-only DATA polling on I/O7. For the AT28C64-12JI in PLCC package, Pin 1 is functional RDY/BUSY-not NC-as confirmed in the "Pin Configurations" section of the datasheet.
AT28C64-12JI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 1ms
- Access Time:
- 120 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT28C64-12JI FAQ
1.How can I place an order for AT28C64-12JI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64-12JI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64-12JI reliable?
The price and inventory of AT28C64-12JI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64-12JI is usually 5 days.
3.What payment methods are accepted for AT28C64-12JI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64-12JI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64-12JI?
AT28C64-12JI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64-12JI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64-12JI?
For technical support, including AT28C64-12JI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64-12JI requirements.
6.How does Aetrix verify that AT28C64-12JI is sourced from the original manufacturer or authorized distributors?
All AT28C64-12JI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64-12JI meets industry standards.
7.What is the process for return or replacement of AT28C64-12JI?
All AT28C64-12JI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64-12JI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64-12JI part is unused and in its original packaging.
Return procedure for AT28C64-12JI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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