My Inquiry
My Account
Microchip Technology AT28C64-15PI
- Part No.:
- AT28C64-15PI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-DIP (0.600", 15.24mm)
- Datasheet:
-
AT28C64-15PI.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28DIP
- Quantity:
- Payment:
- Shipping:
Inventory:1,920
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT28C64-15PI from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with 150 ns read access time, 1 ms byte write cycle, JEDEC-standard 28-pin PDIP package, and industrial temperature range (–40°C to +85°C), used for nonvolatile configuration storage in embedded controllers and legacy microprocessor systems.
For engineers reviewing the AT28C64-15PI datasheet, AT28C64-15PI pinout, AT28C64-15PI application, or AT28C64-15PI equivalent, key selection criteria include byte-write timing, RDY/BUSY signaling support, CMOS/TTL compatibility, VCC sense write protection, and industrial-grade reliability for long-term firmware parameter retention.
Technical Context
The AT28C64-15PI operates as a drop-in SRAM-compatible nonvolatile memory: reads require CE and OE low with WE high; writes initiate on falling WE (or CE) edge, latching address and data internally before self-timed erase-and-program execution. It supports two end-of-write detection methods: open-drain RDY/BUSY output and DATA polling on I/O7.
Its architecture includes internal address/data latches, a control timer, automatic clear-before-write, and VCC-sense write inhibition below 3.8 V. The device also provides CHIP CLEAR via 12 V on OE and 32 bytes of user-accessible identification EEPROM at addresses 1FE0H–1FFFH.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits) - sufficient for boot code, calibration tables, or device configuration in 8-bit systems |
| Read Access Time | 150 ns max - enables direct interface with 6–8 MHz Z80, 8085, or 68000-based systems without wait states |
| Byte Write Cycle | 1 ms typical - deterministic timing allows predictable firmware update scheduling in real-time environments |
| Supply Voltage | 5 V ±10% - compatible with standard TTL/CMOS logic rails and legacy power domains |
| Operating Temperature | –40°C to +85°C - qualified for industrial control panels, motor drives, and outdoor instrumentation |
| Standby Current | 100 µA max (CMOS) - enables low-power retention in battery-backed or energy-constrained applications |
| Endurance | 10,000 write/erase cycles - supports field-updatable parameters with multi-year service life under typical usage |
| Data Retention | 10 years at +85°C - ensures configuration integrity across product lifecycle without refresh |
Pinout & Package
AT28C64-15PI is supplied in a 28-lead, 0.600" wide plastic dual in-line package (PDIP), JEDEC MS-011 AB compliant, with through-hole mounting and 2.54 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus for accessing full 8K-word memory space (0000H–1FFFH) |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface supporting SRAM-like read/write handshaking |
| CE | Chip Enable | Active-low chip select; must be low for any memory access; enables standby current reduction when high |
| OE | Output Enable | Active-low output control; used with CE to prevent bus contention during reads |
| WE | Write Enable | Active-low write strobe; falling edge latches address and initiates self-timed byte write |
| RDY/BUSY | Open-Drain Status Output | Pulled low during write; released high upon completion - supports wired-OR multi-device status monitoring |
| VCC | Power Supply | +5 V ±10% supply; powers core logic and memory array; enables VCC-sense write protection |
| GND | Ground Reference | Signal and power return path; required for proper noise margin and timing compliance |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed byte write | Eliminates external timing circuitry; internal control timer handles erase-and-program sequence automatically |
| RDY/BUSY and DATA polling | Dual asynchronous write-completion detection - enables flexible software or hardware flow control |
| VCC sense write protection | Prevents inadvertent writes during power ramp-up or brownout by disabling WE function below 3.8 V |
| JEDEC-standard pinout | Ensures board-level compatibility with existing 28-pin EPROM/EEPROM footprints and socket designs |
| Industrial temperature grade | Validated operation from –40°C to +85°C - suitable for deployment in uncontrolled ambient environments |
| 32-byte ID memory | User-accessible EEPROM block at 1FE0H–1FFFH for serialization, calibration data, or firmware version tracking |
Applications
| Industrial PLC Configuration Storage | Legacy Microprocessor Bootloader Memory |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory automation cabinets. IC Role / Device Role / Timing Role: Nonvolatile configuration register bank accessed via 8-bit parallel bus during system initialization and runtime updates. Use Value: 10-year data retention and 10,000-cycle endurance ensure parameter persistence across maintenance intervals without battery backup. |
Use Scenario: Holding boot code and hardware initialization routines for Z80- or 8085-based test equipment where ROM replacement is impractical. IC Role / Device Role / Timing Role: SRAM-compatible instruction memory mapped into lower address space; read at reset with 150 ns timing. Use Value: JEDEC pinout and TTL/CMOS compatibility allow direct substitution for obsolete 2764 EPROMs without PCB redesign. |
| Medical Device Calibration Table Storage | Point-of-Sale Terminal Parameter Retention |
Use Scenario: Archiving sensor calibration coefficients and user-adjusted gain settings in portable diagnostic instruments subject to periodic recalibration. IC Role / Device Role / Timing Role: Secure, write-protected nonvolatile memory accessed only during calibration mode via dedicated firmware commands. Use Value: VCC-sense and 12 V CHIP CLEAR provide controlled, tamper-resistant write enablement aligned with medical device safety standards. |
Use Scenario: Preserving tax rate tables, receipt formatting rules, and operator IDs in thermal receipt printers operating in retail environments with frequent power cycling. IC Role / Device Role / Timing Role: Low-power configuration store powered from main 5 V rail; retains data during AC dropout using <100 µA standby current. Use Value: Industrial temperature rating ensures reliable operation inside enclosed kiosks exposed to ambient swings from 0°C to 45°C. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-15PI | Enhanced revision with improved data retention (20 years), tighter tACC spec (150 ns guaranteed), and updated DC characteristics | Same pinout and timing; preferred for new designs requiring extended lifecycle validation | Select AT28C64B-15PI when long-term obsolescence mitigation and enhanced reliability certification are required |
| MX28LV640E-15PC | 3.3 V core with 5 V tolerant I/O; 200 µs fast write option; no RDY/BUSY pin (DATA polling only); SOIC-28 package | Requires level-shifting for 5 V systems; lacks open-drain BUSY signaling for multi-device coordination | Choose MX28LV640E-15PC only if migrating to 3.3 V design and accepting trade-offs in status signaling and package form factor |
Compared with AT28C64-15PI, the AT28C64B-15PI offers verified longevity and tighter parametric guarantees for mission-critical deployments, while the MX28LV640E-15PC shifts voltage domain and removes RDY/BUSY - making it unsuitable for legacy 5 V bus architectures requiring hardware handshake coordination.
Availability
AT28C64-15PI is available at Aetrix Electronics and suitable for industrial control systems, legacy microprocessor upgrades, and medical instrumentation requiring stable component supply with guaranteed long-term availability and traceable sourcing.
Supply support for AT28C64-15PI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT28C64-15PI belongs to Atmel's parallel EEPROM product line, designed specifically for pin-compatible replacement of UV-erasable EPROMs in 8-bit embedded systems requiring field-updatable nonvolatile storage.
FAQ
What is the maximum operating temperature range for the AT28C64-15PI?
The AT28C64-15PI is rated for industrial temperature operation from –40°C to +85°C. This specification is confirmed in the "DC and AC Operating Range" table of the official Atmel datasheet (Rev. 0001H), and applies specifically to all PI-suffixed variants including AT28C64-15PI. Operation outside this range may result in timing violations or data corruption.
Does the AT28C64-15PI support hardware write protection?
Yes, the AT28C64-15PI implements three hardware write protection mechanisms: (1) VCC sense - write inhibited if VCC drops below ~3.8 V; (2) power-on delay - automatic 5 ms lockout after VCC reaches threshold; and (3) signal-level inhibition - write disabled if CE is high, OE is low, or WE is high. These features are intrinsic to the AT28C64-15PI silicon and require no external components.
Can the AT28C64-15PI be used as a direct replacement for a 2764 EPROM?
The AT28C64-15PI shares the same 28-pin PDIP package and JEDEC-standard pinout as the 2764 EPROM, and supports identical read-cycle timing (150 ns). However, unlike the 2764, the AT28C64-15PI requires active WE control and supports byte-level writes - meaning firmware must manage write enable sequencing, but no UV eraser or programming hardware is needed. So it is a functional, not pin-for-pin, replacement.
What is the purpose of the RDY/BUSY pin on the AT28C64-15PI?
The RDY/BUSY pin (Pin 1) on the AT28C64-15PI is an open-drain output that goes low during byte write execution and returns high upon completion. It enables hardware flow control - multiple AT28C64-15PI devices can share a single BUSY line via wired-OR connection. This pin is present and functional on the AT28C64-15PI, distinguishing it from the AT28C64X variant where Pin 1 is NC.
How many write/erase cycles is the AT28C64-15PI rated for?
The AT28C64-15PI is rated for 10,000 write/erase cycles, as specified in the "High Reliability" section of the Atmel datasheet. This endurance rating applies to the standard AT28C64 (non-"E" suffix) variant - the AT28C64E-15PI offers 100,000 cycles but uses different internal architecture and is not interchangeable with the AT28C64-15PI without validation.
AT28C64-15PI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-DIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 1ms
- Access Time:
- 150 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 28-PDIP
AT28C64-15PI FAQ
1.How can I place an order for AT28C64-15PI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64-15PI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64-15PI reliable?
The price and inventory of AT28C64-15PI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64-15PI is usually 5 days.
3.What payment methods are accepted for AT28C64-15PI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64-15PI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64-15PI?
AT28C64-15PI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64-15PI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64-15PI?
For technical support, including AT28C64-15PI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64-15PI requirements.
6.How does Aetrix verify that AT28C64-15PI is sourced from the original manufacturer or authorized distributors?
All AT28C64-15PI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64-15PI meets industry standards.
7.What is the process for return or replacement of AT28C64-15PI?
All AT28C64-15PI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64-15PI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64-15PI part is unused and in its original packaging.
Return procedure for AT28C64-15PI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28C64-15PI Tags
-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology
-
AT21CS01-STUM10-T
Microchip Technology
-
AT24C02C-SSHM-T
Microchip Technology
-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics
-
AT24CS02-SSHM-T
Microchip Technology
-
93LC46BT-I/OT
Microchip Technology
-
AT24C04C-SSHM-T
Microchip Technology
-
24LC01BT-I/SN
Microchip Technology
-
24AA02UIDT-I/OT
Microchip Technology
-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
