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Microchip Technology AT28C64-25JC
- Part No.:
- AT28C64-25JC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT28C64-25JC.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 32PLCC
- Quantity:
- Payment:
- Shipping:
Inventory:3,140
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Product details
Overview
AT28C64-25JC from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 250 ns read access time, 1 ms fast byte write cycle, and CMOS/TTL-compatible I/O. It operates at 5V ±10%, supports commercial temperature range (0°C to 70°C), and delivers 30 mA active current with 100 µA standby current for embedded microcontroller systems requiring nonvolatile storage with direct bus interfacing.
For engineers reviewing the AT28C64-25JC datasheet, AT28C64-25JC pinout, AT28C64-25JC application, or AT28C64-25JC equivalent, this page provides verified timing parameters, RDY/BUSY and DATA polling support, self-timed write architecture, JEDEC-compliant PLCC-32 packaging, and industrial-grade reliability data including 10⁴ write cycles and 10-year data retention.
Technical Context
The AT28C64-25JC implements a self-timed byte write cycle with internal address/data latching and automatic clear-before-write logic, eliminating external timing control. Its READY/BUSY open-drain output and I/O7 DATA polling provide two independent methods to detect write completion without CPU intervention.
It functions as a drop-in replacement for SRAM in read/write cycles-CE and OE jointly enable output, WE initiates writes-and includes VCC sense, power-on delay, and input-level write inhibition to prevent inadvertent programming. The device integrates 32 bytes of user-accessible identification memory at addresses 1FE0H–1FFFH using A9 = 12 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits); sufficient for firmware boot code, calibration tables, or configuration storage in 8-bit microcontroller systems. |
| Read Access Time | 250 ns maximum; enables real-time data retrieval without wait states on 4 MHz Z80 or 8051 buses. |
| Byte Write Time | 1 ms typical; self-timed internal cycle allows full bus release during programming-no external timing circuitry required. |
| Supply Voltage | 5 V ±10%; compatible with legacy TTL/CMOS logic families and standard 5 V system rails. |
| Endurance | 10,000 write/erase cycles; validated for field-updatable parameter storage in industrial controllers with annual reconfiguration. |
| Data Retention | 10 years at 70°C; ensures long-term integrity of stored settings without refresh in unpowered storage. |
| Operating Temperature | 0°C to +70°C; qualified for commercial-grade instrumentation, PC peripherals, and consumer electronics. |
| Standby Current | 100 µA (CMOS); reduces system power budget in battery-backed or low-power sleep modes. |
Pinout & Package
AT28C64-25JC is packaged in a 32-lead Plastic J-Leaded Chip Carrier (PLCC), JEDEC MS-016 AE compliant, with 1.27 mm pitch and surface-mount footprint. Pin 1 is index-marked; pins 1 and 17 are designated "Don't Connect" per manufacturer specification.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; compatible with 8085, Z80, and 68000 lower-address lines. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; high-impedance when CE or OE is high, enabling shared bus operation. |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read access; used with WE low to initiate byte write. |
| OE | Output Enable | Active-low output gate; controls data bus drive; held high during write to inhibit output contention. |
| WE | Write Enable | Active-low write strobe; falling edge latches address, rising edge latches data; initiates self-timed write cycle. |
| RDY/BUSY | Open-Drain Status Output | Pulled low during write; released high upon completion; supports wired-OR connection across multiple devices. |
| VCC | Power Supply | +5 V ±10% supply; internally regulated for write voltage generation; includes VCC sense for write protection. |
| GND | Ground Reference | Signal and power ground; decoupling capacitor required within 1 cm of VCC pin for stable operation. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed byte write | Eliminates need for external write pulse generators or timing logic-address and data latched internally, freeing CPU bus immediately after initiation. |
| Dual write completion detection | RDY/BUSY pin and I/O7 DATA polling provide hardware- and software-based options for synchronizing write operations in interrupt-driven or polling architectures. |
| Write protection architecture | VCC sense (<3.8 V inhibits write), 5 ms power-on delay, and triple-input inhibit (CE high / OE low / WE high) prevent accidental overwrites during power transitions or noise events. |
| JEDEC-standard pinout | Ensures compatibility with existing PCB layouts designed for 2764/27128 EPROMs or 6264 SRAMs-no redesign needed for drop-in upgrade to nonvolatile storage. |
| User-accessible ID memory | 32 bytes at 1FE0H–1FFFH, accessed via A9 = 12 V, enable unique device serialization, revision tracking, or calibration offset storage without consuming main array space. |
Applications
| Industrial PLC Configuration Storage | Legacy PC BIOS Parameter Backup |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning constants, and alarm thresholds in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Nonvolatile configuration register bank accessed via 8-bit parallel bus during startup and runtime reconfiguration. Use Value: Enables field updates without EEPROM programmer; 10⁴ endurance supports quarterly calibration adjustments over 10+ year product life. |
Use Scenario: Preserving CMOS setup values (date/time, boot order, peripheral enables) across AC power loss in desktop motherboards using ISA or LPC bus interfaces. IC Role / Device Role / Timing Role: Directly mapped into CPU I/O space as a static RAM-equivalent device with identical read/write timing behavior. Use Value: 250 ns access matches 80286/386 bus timing; 100 µA standby current minimizes RTC battery drain during extended shutdown. |
| Medical Device Calibration Table Storage | Point-of-Sale Terminal Firmware Patch Area |
Use Scenario: Holding sensor gain/offset coefficients and linearization curves for blood glucose meters and infusion pumps requiring FDA-regulated traceability. IC Role / Device Role / Timing Role: Secure, tamper-resistant nonvolatile memory accessed only during service mode via dedicated diagnostic port. Use Value: 10-year data retention meets medical device shelf-life requirements; 12 V A9 programming enables locked ID block for audit trail verification. |
Use Scenario: Hosting hot-fix patches and localized language strings in retail terminals where firmware updates occur in-store via serial download. IC Role / Device Role / Timing Role: Memory-mapped update partition isolated from main application code, written via microcontroller UART-to-parallel bridge. Use Value: Self-timed 1 ms writes allow background patching without freezing UI; RDY/BUSY signal prevents concurrent read access during update. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-25JC | Revised version with improved data retention (20 years) and enhanced ESD tolerance; same pinout, timing, and voltage specs. | Preferred for new designs requiring extended archival storage or higher robustness in noisy industrial environments. | Select AT28C64B-25JC for new designs; AT28C64-25JC remains valid for legacy board reuse or cost-sensitive volume production. |
| MX28F640KC-25JC | Intel-compatible 64 Kbit flash EEPROM; requires 12 V VPP for programming; no RDY/BUSY pin; 500 ns read access; 10⁵ endurance. | Suitable where higher endurance is critical but RDY/BUSY signaling and sub-500 ns timing are not required. | Choose MX28F640KC-25JC only if flash-specific features (sector erase, faster bulk writes) are needed; not a pin-compatible substitute. |
Compared with AT28C64-25JC, the AT28C64B-25JC offers longer data retention without layout or firmware changes, while the MX28F640KC-25JC trades RDY/BUSY support and speed for higher endurance and flash architecture-but requires VPP routing and lacks self-timed writes.
Availability
AT28C64-25JC is available at Aetrix Electronics and suitable for industrial control systems, legacy computing platforms, and medical instrumentation requiring stable component supply, long-lifecycle support, and JEDEC-standard parallel EEPROM functionality.
Supply support for AT28C64-25JC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for embedded applications.
The AT28C64 series was designed as a direct-replacement parallel EEPROM for legacy EPROM/SRAM sockets, targeting 8-bit microprocessor systems needing reliable, low-power, field-programmable nonvolatile storage without external timing components.
FAQ
What is the maximum read access time specified for AT28C64-25JC?
The AT28C64-25JC has a maximum read access time of 250 ns, measured from address stabilization to valid data on I/O0–I/O7 under commercial temperature conditions (0°C to +70°C) and VCC = 5 V ±10%. This value is guaranteed across all operating conditions and aligns with the "-25" speed grade designation in the part number.
Does AT28C64-25JC support both hardware and software methods to detect write completion?
Yes, AT28C64-25JC supports two independent write completion detection methods: the RDY/BUSY pin (open-drain, pulled low during write) and DATA polling on I/O7 (complement of written data until completion). Both are fully functional in the PLCC package and require no external components.
Is AT28C64-25JC pin-compatible with standard SRAM or EPROM devices?
Yes, AT28C64-25JC uses a JEDEC-approved byte-wide pinout identical to 2764 EPROMs and 6264 SRAMs. Its CE, OE, and WE control scheme allows direct substitution in existing 28-pin DIP or 32-pin PLCC sockets without PCB modification-provided VCC and timing constraints are met.
What write protection mechanisms does AT28C64-25JC implement?
AT28C64-25JC implements three hardware-level write protections: (1) VCC sense that disables writes below ~3.8 V, (2) 5 ms internal power-on delay before write enable, and (3) logical inhibition requiring CE low, OE high, and WE low simultaneously-any deviation blocks byte programming.
Can AT28C64-25JC be used in industrial temperature applications?
No-AT28C64-25JC is rated for commercial temperature range only (0°C to +70°C). For industrial operation (-40°C to +85°C), the correct variant is AT28C64-25JI (same speed, same PLCC package, extended temperature qualification).
AT28C64-25JC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 1ms
- Access Time:
- 250 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT28C64-25JC FAQ
1.How can I place an order for AT28C64-25JC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64-25JC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64-25JC reliable?
The price and inventory of AT28C64-25JC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64-25JC is usually 5 days.
3.What payment methods are accepted for AT28C64-25JC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64-25JC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64-25JC?
AT28C64-25JC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64-25JC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64-25JC?
For technical support, including AT28C64-25JC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64-25JC requirements.
6.How does Aetrix verify that AT28C64-25JC is sourced from the original manufacturer or authorized distributors?
All AT28C64-25JC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64-25JC meets industry standards.
7.What is the process for return or replacement of AT28C64-25JC?
All AT28C64-25JC units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64-25JC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64-25JC part is unused and in its original packaging.
Return procedure for AT28C64-25JC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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