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Microchip Technology AT28C64-25SC
- Part No.:
- AT28C64-25SC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28C64-25SC.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:4,132
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Product details
Overview
AT28C64-25SC from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 250 ns maximum read access time, 1 ms or 200 µs byte write capability, and CMOS/TTL-compatible I/O for direct microprocessor interfacing in embedded control and firmware storage applications.
For engineers reviewing the AT28C64-25SC datasheet, AT28C64-25SC pinout, AT28C64-25SC application, or AT28C64-25SC equivalent, key selection criteria include read timing (tACC = 250 ns), standby current (100 µA), RDY/BUSY or DATA polling support, industrial temperature range (–40°C to +85°C), and SOIC-28 package compatibility with legacy 8-bit bus systems.
Technical Context
The AT28C64-25SC operates as a drop-in SRAM-compatible nonvolatile memory: CE and OE jointly enable read access while WE initiates self-timed byte writes with internal address/data latching and automatic erase-before-write. It supports two end-of-write detection methods-open-drain RDY/BUSY output (pin 1) and DATA polling on I/O7-with no external timing components required.
Its architecture includes VCC sense (write inhibit below 3.8 V), 5 ms power-on delay, and dual write-inhibit logic (OE low, CE high, or WE high). The device also provides 32 bytes of user-accessible identification EEPROM at addresses 1FE0H–1FFFH using A9 = 12 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits); sufficient for boot code, calibration tables, or configuration data in 8-bit microcontroller systems. |
| Read Access Time | 250 ns max (tACC); meets timing requirements for 4 MHz Z80, 8085, and 68000-based designs without wait states. |
| Byte Write Time | 1 ms standard or 200 µs (AT28C64E variant); enables rapid field updates of small firmware patches or parameter sets. |
| Supply Voltage | 5 V ±10%; compatible with standard TTL/CMOS logic rails and eliminates need for auxiliary voltage regulators. |
| Standby Current | 100 µA (CMOS mode); critical for battery-backed systems where quiescent power must remain sub-200 µW. |
| Endurance | 10,000 write cycles (standard); validated for infrequent configuration updates over 10-year product lifetimes. |
| Data Retention | 10 years at +85°C; ensures firmware integrity in industrial controllers exposed to elevated ambient temperatures. |
Pinout & Package
AT28C64-25SC is packaged in a 28-lead, 0.300" wide plastic SOIC (Small Outline Integrated Circuit) per JEDEC MS-012, with gull-wing leads and standard 1.27 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; compatible with 8080/Z80 16-bit address buses via A0–A12 routing. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; electrically compatible with TTL/CMOS logic levels and directly connectable to microprocessor data bus. |
| CE | Chip Enable | Active-low chip select; enables memory access only when asserted, allowing multi-chip decoding in larger memory maps. |
| OE | Output Enable | Active-low output control; decouples data bus during reads without affecting address or control lines. |
| WE | Write Enable | Active-low write strobe; initiates self-timed byte write cycle with internal latching and erase-before-write sequence. |
| RDY/BUSY | Open-Drain Status Output | Active-low signal indicating write progress; supports wired-OR connection across multiple devices for centralized status monitoring. |
| VCC, GND | Power Supply | Single 5 V supply with dedicated ground; no separate VPP or programming voltage required during normal operation. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed byte write | Eliminates external timing circuitry; internal control timer handles erase-and-program sequence automatically after WE pulse. |
| DATA polling on I/O7 | Enables software-driven write completion detection without hardware interrupts or additional pins-critical for resource-constrained MCUs. |
| RDY/BUSY open-drain output | Allows shared status bus across multiple EEPROMs; simplifies system-level write coordination in multi-device configurations. |
| VCC sense and power-on delay | Prevents inadvertent writes during power ramp-up or brown-out conditions; ensures data integrity without external supervisor ICs. |
| User-accessible ID memory | 32-byte dedicated EEPROM region (1FE0H–1FFFH) for serialization, calibration data, or firmware version tracking. |
Applications
| Industrial PLC Configuration Storage | Legacy Microcontroller Bootloader Memory |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers operating continuously at 65°C ambient. IC Role / Device Role / Timing Role: Nonvolatile configuration store accessed during startup and runtime via 8-bit parallel bus; read during initialization, written only during commissioning or firmware update. Use Value: 10-year data retention at +85°C and 100 µA standby current ensure reliability in unattended deployments without battery backup. | Use Scenario: Holding bootloader code and secure boot keys for Z80- or 8085-based medical diagnostic instruments requiring field-upgradable firmware. IC Role / Device Role / Timing Role: Primary boot memory mapped into CPU address space; read at reset vector; written only during authorized firmware updates using RDY/BUSY handshake. Use Value: 250 ns read access avoids wait states on 4 MHz bus; self-timed 1 ms writes prevent MCU lockup during updates. |
| Point-of-Sale Terminal Parameter Tables | Automated Test Equipment Calibration Storage |
Use Scenario: Storing tax rate tables, currency conversion factors, and printer configuration in retail terminals deployed globally across commercial and industrial temperature ranges. IC Role / Device Role / Timing Role: Static RAM–compatible EEPROM used as read-mostly parameter ROM; updated quarterly via service port using DATA polling. Use Value: JEDEC-standard pinout allows direct replacement of obsolete EPROMs; 10,000-cycle endurance exceeds required update frequency over 7-year product life. | Use Scenario: Retaining per-channel gain/offset coefficients and sensor linearization data in benchtop multimeters and oscilloscopes calibrated annually. IC Role / Device Role / Timing Role: Calibration data repository accessed during self-test; written once per calibration event using 12 V A9 programming for device ID verification. Use Value: Dedicated 32-byte ID EEPROM enables traceable calibration logs; 5 V-only operation simplifies test fixture design versus UV-EPROM or Flash alternatives. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-25SC | Improved endurance (100K cycles), faster write (200 µs), same pinout and timing; requires A9 = 12 V for ID memory access. | Supports more frequent field updates; retains identical read timing and SOIC-28 footprint. | Select when >10K write cycles are needed; verify 12 V A9 capability in host system. |
| MX28LV640C-25SC | Same 64 Kbit size and SOIC-28 package; 250 ns read, but uses 3.3 V core with 5 V tolerant I/O; no RDY/BUSY pin. | Requires level-shifting for pure 5 V systems; relies solely on DATA polling for write completion. | Choose for mixed-voltage designs or where lower active power (25 mA vs. 30 mA) is prioritized over hardware status signaling. |
Compared with AT28C64-25SC, AT28C64B-25SC offers higher endurance and faster writes without layout changes, while MX28LV640C-25SC reduces power and supports modern 3.3 V domains but removes RDY/BUSY hardware signaling-making it suitable only where software polling suffices and voltage translation is acceptable.
Availability
AT28C64-25SC is available at Aetrix Electronics and suitable for industrial control, legacy microcontroller boot storage, and point-of-sale terminal parameter retention requiring stable component supply across extended product lifecycles.
Supply support for AT28C64-25SC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) designed high-reliability nonvolatile memory and microcontroller solutions for industrial, automotive, and communications markets before its 2016 acquisition.
The AT28C64 series was developed as a pin-compatible, SRAM-drop-in EEPROM replacement for 8-bit embedded systems needing field-updatable firmware storage without external timing or high-voltage programming circuitry.
FAQ
What is the maximum read access time specified for the AT28C64-25SC?
The AT28C64-25SC has a maximum read access time (tACC) of 250 ns under commercial and industrial temperature ranges with VCC = 5 V ±10%. This value is guaranteed across all valid operating conditions and enables direct interfacing with 4 MHz Z80, 8085, and 68000 processors without wait-state insertion. The AT28C64-25SC datasheet specifies this timing in the AC Read Characteristics table, confirming compatibility with legacy bus timing budgets.
Does the AT28C64-25SC require a high-voltage programming supply during normal operation?
No, the AT28C64-25SC operates exclusively from a single 5 V ±10% supply during read and standard byte write operations. High voltage (12 V ±0.5 V on A9) is required only for accessing the 32-byte device identification EEPROM region (1FE0H–1FFFH) or performing CHIP CLEAR; it is not needed for routine firmware or configuration storage. The AT28C64-25SC integrates VCC sensing and internal timing to eliminate external VPP circuitry in standard use cases.
How does write completion detection work on the AT28C64-25SC?
The AT28C64-25SC supports two independent write completion detection methods: (1) hardware signaling via the open-drain RDY/BUSY pin (pin 1), which pulls low during write and releases upon completion; and (2) software polling of I/O7, which returns the complement of written data until the write finishes, then outputs true data. Both methods are fully supported in the AT28C64-25SC and require no external components-enabling flexible integration in systems with or without dedicated status interrupt lines.
What is the endurance rating and data retention period for the AT28C64-25SC?
The AT28C64-25SC is rated for 10,000 write/erase cycles and guarantees 10 years of data retention at +85°C ambient temperature. These specifications are validated per JEDEC standards and apply across the full industrial temperature range (–40°C to +85°C). The AT28C64-25SC achieves this reliability through Atmel's proprietary nonvolatile technology, including internal error correction and optimized charge trapping, making it suitable for long-life industrial deployments where field updates are infrequent but mission-critical.
Which package type and pin count does the AT28C64-25SC use?
The AT28C64-25SC uses a 28-lead, 0.300" wide plastic SOIC (Small Outline Integrated Circuit) package, compliant with JEDEC MS-012 and designated as package code "28S". It features gull-wing leads with 1.27 mm pitch and a body width of 7.5 mm. This package matches the pinout of industry-standard 28-pin parallel memories, enabling direct PCB replacement of obsolete EPROMs or earlier EEPROM generations without layout modification.
AT28C64-25SC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 1ms
- Access Time:
- 250 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28C64-25SC FAQ
1.How can I place an order for AT28C64-25SC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64-25SC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64-25SC reliable?
The price and inventory of AT28C64-25SC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64-25SC is usually 5 days.
3.What payment methods are accepted for AT28C64-25SC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64-25SC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64-25SC?
AT28C64-25SC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64-25SC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64-25SC?
For technical support, including AT28C64-25SC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64-25SC requirements.
6.How does Aetrix verify that AT28C64-25SC is sourced from the original manufacturer or authorized distributors?
All AT28C64-25SC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64-25SC meets industry standards.
7.What is the process for return or replacement of AT28C64-25SC?
All AT28C64-25SC units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64-25SC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64-25SC part is unused and in its original packaging.
Return procedure for AT28C64-25SC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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