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Microchip Technology AT28C64-25SI
- Part No.:
- AT28C64-25SI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28C64-25SI.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:4,423
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Product details
Overview
AT28C64-25SI from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 250 ns read access time, 1 ms or 200 µs byte write capability, and CMOS/TTL-compatible I/O - used for nonvolatile configuration storage in industrial microcontroller systems requiring field-upgradable firmware parameters.
For engineers reviewing the AT28C64-25SI datasheet, AT28C64-25SI pinout, AT28C64-25SI application, or AT28C64-25SI equivalent, key selection considerations include its self-timed write cycle, READY/BUSY and DATA polling status reporting, 5V ±10% supply operation, industrial temperature range (–40°C to +85°C), and SOIC-28 package compatibility with legacy 8-bit bus interfaces.
Technical Context
The AT28C64-25SI operates as a drop-in parallel memory replacement for SRAM in read cycles and integrates internal address/data latching and an autonomous control timer for byte writes - eliminating external timing logic. Its RDY/BUSY open-drain output and I/O7 data polling provide two hardware- or software-based methods to detect write completion.
It supports direct microprocessor control via standard CE/OE/WE strobes, includes VCC sense and power-on delay for inadvertent-write protection, and offers CHIP CLEAR and device identification (32-byte reserved area) functions using 12 V on A9 or OE - all while maintaining <100 µA CMOS standby current and JEDEC-compliant pinout across PDIP, SOIC, TSOP, and PLCC packages.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 64 Kbit (8,192 × 8 bits) - provides sufficient space for boot code flags, calibration tables, or device configuration in embedded controllers. |
| Read Access Time | 250 ns max - enables reliable interfacing with 4–8 MHz 8-bit microprocessors without wait states. |
| Byte Write Time | 1 ms (standard) or 200 µs (E-version) - determines minimum time between successive parameter updates in runtime configuration systems. |
| Supply Voltage | 5 V ±10% - compatible with legacy 5 V logic families and eliminates need for level-shifting in industrial MCU designs. |
| Operating Temperature | –40°C to +85°C - certified for use in industrial automation, motor drives, and outdoor metering equipment. |
| Standby Current | 100 µA (CMOS) - reduces system-level power consumption during idle periods in battery-backed or energy-sensitive applications. |
| Endurance | 10,000 write/erase cycles (standard) - supports infrequent but critical field updates over multi-year product lifetimes. |
| Data Retention | 10 years at +85°C - ensures long-term reliability of stored calibration or security keys without refresh. |
Pinout & Package
AT28C64-25SI is supplied in a 28-lead, 0.300" wide plastic gull-wing small outline (SOIC) package per JEDEC MS-012, with 300 mil body width and standard surface-mount footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; TTL/CMOS compatible thresholds. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; outputs high-impedance when CE or OE high; supports DATA polling on I/O7. |
| CE | Chip Enable | Active-low chip select; must be low for read/write; high disables outputs and enables standby mode. |
| OE | Output Enable | Active-low read strobe; controls output buffer enable independently of CE for bus contention management. |
| WE | Write Enable | Active-low write strobe; initiates self-timed byte write on falling edge; latches address and data internally. |
| RDY/BUSY | Status Output | Open-drain active-low signal indicating write in progress; released upon completion; supports wired-OR multi-device monitoring. |
| VCC | Power Supply | +5 V ±10% supply input; includes internal VCC sense circuitry to inhibit writes below 3.8 V. |
| GND | Ground Reference | Signal and power ground reference for all inputs, outputs, and internal logic. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed byte write cycle | Eliminates external timing components and simplifies microcontroller firmware by automating clear-before-write and internal timing. |
| Dual write completion detection | RDY/BUSY pin and I/O7 DATA polling provide flexible hardware- or software-synchronized write termination handling. |
| JEDEC-standard byte-wide pinout | Ensures mechanical and electrical compatibility with existing PCB layouts designed for 28-pin parallel EEPROMs or SRAMs. |
| Inadvertent write protection | VCC sense, 5 ms power-on delay, and triple-gate inhibit (CE high / OE low / WE high) prevent spurious writes during power transitions. |
| Industrial temperature support | Guaranteed operation from –40°C to +85°C enables deployment in harsh environments without derating or thermal management. |
| Device identification area | 32 bytes of reserved EEPROM (1FE0H–1FFFH) accessible via 12 V on A9 for unique serialization or firmware version tracking. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing sensor calibration coefficients, alarm thresholds, and user preferences in programmable logic controllers deployed in factory-floor environments. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed via 8-bit parallel bus during system boot and runtime parameter updates. Use Value: Ensures settings persist across power cycles and field upgrades; 10,000-cycle endurance supports decades of recalibration events. |
Use Scenario: Retaining patient-specific therapy parameters and device serial traceability in portable infusion pumps and diagnostic monitors. IC Role / Device Role / Timing Role: Secure, low-power configuration store interfaced directly to microcontroller's data bus with write-protection safeguards. Use Value: 10-year data retention at +85°C meets medical regulatory requirements for long-term data integrity without backup power. |
| Automotive Body Control Module (BCM) | Point-of-Sale Terminal Firmware Flags |
Use Scenario: Holding door lock logic states, lighting profiles, and seat position presets in automotive BCMs operating across extended temperature ranges. IC Role / Device Role / Timing Role: Parallel EEPROM providing deterministic 250 ns read access and robust write sequencing under vehicle EMI conditions. Use Value: Industrial-grade –40°C to +85°C rating and VCC-sense write inhibition ensure reliability during cold cranking and engine bay heat exposure. |
Use Scenario: Storing payment terminal firmware revision IDs, encryption key flags, and regional compliance settings subject to periodic remote updates. IC Role / Device Role / Timing Role: Field-upgradable nonvolatile memory accessed via microcontroller's external memory interface during secure OTA updates. Use Value: Self-timed 1 ms write cycle enables safe parameter updates without CPU intervention; RDY/BUSY signaling prevents race conditions. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-25SI | Enhanced revision with improved data retention (100 years @ +25°C) and tighter tACC tolerance; same pinout and timing. | Preferred for new designs requiring extended archival data integrity; backward-compatible drop-in replacement. | Select AT28C64B-25SI for new designs where long-term data retention is critical; AT28C64-25SI remains valid for legacy-replacement scenarios. |
| MX28F640J3F-25SI | Intel-compatible 64 Kbit parallel EEPROM with identical 28-pin SOIC package and 250 ns access, but requires external VPP for programming. | Lacks integrated VCC-sense write protection and self-timed write; needs 12 V programming supply not required by AT28C64-25SI. | Choose MX28F640J3F-25SI only if Intel architecture compatibility is mandatory; AT28C64-25SI offers simpler 5 V-only operation and superior write safety features. |
Compared with AT28C64B-25SI, the AT28C64-25SI offers proven legacy compatibility but less archival retention; versus MX28F640J3F-25SI, it eliminates external VPP dependency and adds built-in write safeguards - making it more suitable for cost-sensitive, safety-critical industrial upgrades.
Availability
AT28C64-25SI is available at Aetrix Electronics and suitable for industrial automation, medical instrumentation, and automotive body electronics requiring stable component supply, long-lifecycle support, and guaranteed SOIC-28 packaging consistency.
Supply support for AT28C64-25SI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and wireless solutions for embedded systems.
The AT28C64 product line was designed specifically for 8-bit microprocessor systems needing simple, reliable, and pin-compatible nonvolatile memory - targeting industrial control, instrumentation, and legacy computing platforms where parallel bus interfaces remain prevalent.
FAQ
What is the maximum read access time specified for the AT28C64-25SI?
The AT28C64-25SI has a maximum read access time (tACC) of 250 ns, measured from address valid to valid data on I/O pins under industrial temperature conditions (–40°C to +85°C) and 5 V ±10% supply. This value is guaranteed across all operating conditions and defines the upper timing limit for synchronous read operations in microprocessor bus cycles.
Does the AT28C64-25SI require a 12 V programming voltage for normal operation?
No, the AT28C64-25SI operates fully from a single 5 V ±10% supply during reads and standard byte writes. A 12 V pulse on A9 or OE is required only for optional functions: CHIP CLEAR (10 ms pulse on WE with OE = 12 V) or accessing the 32-byte device identification area (1FE0H–1FFFH); these are infrequent, non-routine operations.
How does write protection work on the AT28C64-25SI?
The AT28C64-25SI implements three independent write protection mechanisms: (1) VCC sense - write inhibited if VCC drops below ~3.8 V; (2) Power-on delay - automatic 5 ms lockout after VCC reaches threshold; and (3) Logic-level inhibit - write disabled if CE is high, OE is low, or WE is high. All three must be satisfied for a write to initiate.
Can the AT28C64-25SI be used as a direct replacement for SRAM in existing designs?
Yes - the AT28C64-25SI uses JEDEC-standard byte-wide pinout and behaves electrically like SRAM during read cycles (CE/OE/WE control, high-impedance outputs when deselected). However, write cycles require explicit status monitoring (RDY/BUSY or DATA polling), unlike volatile SRAM, so firmware must accommodate the asynchronous write completion.
What package type is used for the AT28C64-25SI?
The AT28C64-25SI is packaged in a 28-lead, 0.300" wide plastic gull-wing small outline (SOIC) package, compliant with JEDEC MS-012. It features standard 1.27 mm lead pitch, 7.62 mm body width, and surface-mount footprint identical to industry-standard 28-pin parallel memories.
AT28C64-25SI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 1ms
- Access Time:
- 250 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28C64-25SI FAQ
1.How can I place an order for AT28C64-25SI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64-25SI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64-25SI reliable?
The price and inventory of AT28C64-25SI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64-25SI is usually 5 days.
3.What payment methods are accepted for AT28C64-25SI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64-25SI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64-25SI?
AT28C64-25SI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64-25SI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64-25SI?
For technical support, including AT28C64-25SI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64-25SI requirements.
6.How does Aetrix verify that AT28C64-25SI is sourced from the original manufacturer or authorized distributors?
All AT28C64-25SI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64-25SI meets industry standards.
7.What is the process for return or replacement of AT28C64-25SI?
All AT28C64-25SI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64-25SI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64-25SI part is unused and in its original packaging.
Return procedure for AT28C64-25SI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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