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Microchip Technology AT28C64-25TI
- Part No.:
- AT28C64-25TI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-TSSOP (0.465", 11.80mm Width)
- Datasheet:
-
AT28C64-25TI.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28TSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,319
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Product details
Overview
AT28C64-25TI from Atmel is an industrial-grade, 64 Kbit (8K × 8) parallel EEPROM with 250 ns read access time, self-timed byte write cycle, and CMOS/TTL-compatible I/O - used for nonvolatile configuration storage in microcontroller-based systems requiring field-upgradable firmware parameters.
For engineers reviewing the AT28C64-25TI datasheet, AT28C64-25TI pinout, AT28C64-25TI application, or AT28C64-25TI equivalent, key selection criteria include industrial temperature support (–40°C to +85°C), JEDEC-standard 28-pin SOIC package, RDY/BUSY signaling, DATA polling capability, and 10⁴/10⁵ endurance cycles depending on variant.
Technical Context
The AT28C64-25TI implements a parallel interface with dual-line chip enable (CE) and output enable (OE) control, enabling bus contention avoidance during mixed-read/write operations. Its internal address and data latching frees the microprocessor bus after write initiation.
Write completion is signaled via open-drain RDY/BUSY (pin 1) or DATA polling on I/O7, and write protection includes VCC sense (<3.8 V inhibition), 5 ms power-on delay, and logic-level inhibit conditions (OE high, CE high, or WE high).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits) - supports full system configuration tables or boot parameter sets without external expansion. |
| Read Access Time | 250 ns max - compatible with 4 MHz Z80, 8051, and 68K-family microprocessors without wait states. |
| Byte Write Time | 1 ms standard (or 200 µs for E variant) - enables rapid field updates of individual calibration values or user settings. |
| Endurance | 10,000 write/erase cycles (standard) - sufficient for infrequent configuration changes over 10+ years of operation. |
| Data Retention | 10 years at +85°C - validated for long-term reliability in industrial control and telecom infrastructure. |
| Supply Voltage | 5 V ±10% - interoperable with legacy 5 V logic families and avoids need for dedicated voltage regulators. |
| Standby Current | 100 µA (CMOS mode) - reduces power budget in battery-backed or energy-sensitive embedded nodes. |
Pinout & Package
AT28C64-25TI is supplied in a 28-lead, 0.300" wide plastic SOIC (Small Outline Integrated Circuit) package per JEDEC MS-012AB, with gull-wing leads and surface-mount compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; TTL/CMOS compatible thresholds. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel data path; high-impedance when disabled; supports true read/write without external transceivers. |
| CE | Chip Enable | Active-low global device select; enables internal logic only when asserted - critical for multi-device memory decoding. |
| OE | Output Enable | Active-low output gate; allows shared bus operation with other peripherals by controlling output drivers independently of CE. |
| WE | Write Enable | Active-low write strobe; initiates self-timed byte write on falling edge; latches address and data internally. |
| RDY/BUSY | Open-Drain Status Output | Actively pulled low during write; released upon completion - supports wired-OR monitoring across multiple devices. |
| VCC, GND | Power Supply | Single 5 V supply; decoupling required within 1 cm for stable 250 ns read timing. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed byte write | Eliminates external timing circuitry; internal control timer handles erase-before-write and verification automatically. |
| DATA polling on I/O7 | Enables software-driven write completion detection without hardware interrupt lines or additional GPIO resources. |
| JEDEC-standard pinout | Ensures drop-in compatibility with legacy SRAM and EPROM sockets in existing PCB layouts. |
| VCC sense write inhibit | Prevents corruption during brown-out or power ramp-up by disabling writes below 3.8 V nominal supply. |
| 32-byte ID area | Provides factory- or user-programmable identification space at addresses 1FE0H–1FFFH for traceability or version tracking. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Parameter Retention |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning constants, and alarm thresholds in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Nonvolatile configuration register bank accessed via 8-bit parallel bus during boot and runtime reconfiguration. Use Value: Guarantees parameter persistence across 100,000+ power cycles and 10-year shelf life under continuous 85°C ambient exposure. |
Use Scenario: Holding sensor offset/gain coefficients and safety-critical operational limits in portable diagnostic equipment subject to regulatory audit. IC Role / Device Role / Timing Role: Secure, tamper-resistant parameter vault with write-protection logic preventing accidental overwrite during firmware updates. Use Value: Meets IEC 62304 Class C software requirements via deterministic 1 ms write cycle and built-in VCC-sense write lockout. |
| Telecom Line Card Bootloader Settings | Automotive Body Control Module NVM |
Use Scenario: Storing MAC addresses, port VLAN assignments, and firmware rollback pointers in carrier-grade Ethernet switches operating 24/7. IC Role / Device Role / Timing Role: Parallel EEPROM interfaced directly to MIPS or ARM9 host processor for fast initialization and hot-swap recovery. Use Value: 250 ns read latency enables sub-100 µs bootloader parameter fetch, reducing system boot time by >15 ms versus serial EEPROM alternatives. |
Use Scenario: Saving seat position memory, mirror presets, and lighting profiles in automotive body control units exposed to –40°C cold cranking and 85°C under-hood conditions. IC Role / Device Role / Timing Role: Industrial-temperature EEPROM integrated into CAN/LIN subsystems for persistent user preference storage. Use Value: Validated 10⁴ endurance and 10-year retention at 85°C ensure reliable operation over full vehicle lifetime without wear leveling firmware. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-25TI | Revised revision with improved data retention (10 years @ 85°C vs. original 10 years @ 70°C) and tighter tACC tolerance (250 ns guaranteed vs. 250 ns max). | Preferred for new designs requiring extended high-temp reliability; identical pinout and timing interface. | Select AT28C64B-25TI if sourcing new production builds - backward compatible but with enhanced characterization. |
| MX28LV640BTC-25G | 3.3 V core with 5 V tolerant I/O; 250 ns access; 100K endurance; no RDY/BUSY pin - relies solely on DATA polling. | Suitable where board-level voltage scaling is implemented; requires software-only polling logic and lacks hardware BUSY indication. | Choose MX28LV640BTC-25G only when migrating to 3.3 V systems and accepting loss of RDY/BUSY hardware signaling. |
Compared with AT28C64-25TI, the AT28C64B-25TI offers verified high-temperature data retention without layout change, while MX28LV640BTC-25G reduces system power but removes hardware BUSY signaling - making AT28C64-25TI optimal for 5 V legacy industrial designs needing robust status feedback.
Availability
AT28C64-25TI is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, telecom infrastructure, and automotive body electronics requiring stable component supply across extended temperature ranges and multi-year production cycles.
Supply support for AT28C64-25TI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for embedded applications.
The AT28C64 product line was designed specifically for 5 V microprocessor systems needing byte-erasable, pin-compatible EEPROM replacements for UV-erasable EPROMs and battery-backed SRAMs.
FAQ
What is the maximum operating temperature range for AT28C64-25TI?
The AT28C64-25TI is rated for industrial temperature operation from –40°C to +85°C. This specification is validated per the manufacturer's DC and AC operating range table and applies to all electrical parameters including read access time (250 ns), standby current (≤100 µA), and write endurance (10⁴ cycles). The "TI" suffix explicitly denotes the industrial temperature grade.
Does AT28C64-25TI support hardware write completion detection?
Yes, AT28C64-25TI supports hardware write completion detection via its open-drain RDY/BUSY pin (pin 1), which is actively pulled low during byte write execution and released upon completion. This signal can be wired-OR'd with other devices and directly connected to a microcontroller interrupt input - eliminating polling overhead in time-critical applications.
Can AT28C64-25TI be used as a direct replacement for standard SRAM in existing designs?
AT28C64-25TI is pin-compatible with many 28-pin 8K×8 SRAMs (e.g., HM6264, IS61C256) due to its JEDEC-approved byte-wide pinout, but differs in write behavior: it requires WE-controlled self-timed writes and has longer write latency (1 ms). It functions identically during reads, but write sequences must accommodate busy-state handshaking via RDY/BUSY or DATA polling.
What write protection mechanisms does AT28C64-25TI implement?
AT28C64-25TI implements three hardware write protection mechanisms: (1) VCC sense - write inhibited if supply drops below ~3.8 V; (2) Power-on delay - automatic 5 ms lockout after VCC reaches threshold; and (3) Logic-level inhibit - writes blocked if OE is high, CE is high, or WE is high. These prevent spurious writes during power transitions or bus glitches.
Is there user-accessible identification memory in AT28C64-25TI?
Yes, AT28C64-25TI includes 32 bytes of additional EEPROM memory at addresses 1FE0H–1FFFH. This area is accessed using the same parallel interface and timing as main memory, but requires raising A9 to 12.0 V ±0.5 V during read/write operations - enabling unique device serialization, firmware version tagging, or manufacturing traceability without external components.
AT28C64-25TI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-TSSOP (0.465", 11.80mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 1ms
- Access Time:
- 250 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSOP
AT28C64-25TI FAQ
1.How can I place an order for AT28C64-25TI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64-25TI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64-25TI reliable?
The price and inventory of AT28C64-25TI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64-25TI is usually 5 days.
3.What payment methods are accepted for AT28C64-25TI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64-25TI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64-25TI?
AT28C64-25TI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64-25TI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64-25TI?
For technical support, including AT28C64-25TI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64-25TI requirements.
6.How does Aetrix verify that AT28C64-25TI is sourced from the original manufacturer or authorized distributors?
All AT28C64-25TI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64-25TI meets industry standards.
7.What is the process for return or replacement of AT28C64-25TI?
All AT28C64-25TI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64-25TI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64-25TI part is unused and in its original packaging.
Return procedure for AT28C64-25TI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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