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Microchip Technology AT28C64B-15JI
- Part No.:
- AT28C64B-15JI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT28C64B-15JI.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 32PLCC
- Quantity:
- Payment:
- Shipping:
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Product details
Overview
AT28C64B-15JI from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 150 ns read access time, hardware/software data protection, and page write capability supporting up to 64-byte writes in ≤10 ms. It operates on single 5 V ±10% supply and is rated for industrial temperature range (–40°C to +85°C), commonly used in firmware storage and configuration retention in embedded controllers.
For engineers reviewing the AT28C64B-15JI datasheet, AT28C64B-15JI pinout, AT28C64B-15JI application, or AT28C64B-15JI equivalent, key selection considerations include its 150 ns read timing, 100 µA CMOS standby current, software data protection enable/disable sequence, DATA polling and toggle bit write completion detection, and industrial-grade temperature tolerance.
Technical Context
The AT28C64B-15JI implements a parallel interface with independent CE/OE/WE control logic enabling SRAM-like read/write cycles without external timing components. Its internal 64-byte page register latches address and data during page write operations, freeing the bus after initial setup.
Write completion is verified via dual methods: DATA polling (complement on I/O7 until completion) and toggle bit (I/O6 toggles during write, stabilizes afterward). Hardware protection includes VCC sense (<3.8 V inhibit), 5 ms power-on delay, noise filtering (<15 ns pulse rejection), and CE/OE/WE state-based write inhibition.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits); sufficient for boot code, calibration tables, or device configuration in microcontroller systems. |
| Read Access Time | 150 ns maximum; enables direct replacement of SRAM or faster EPROM in legacy 8-bit bus systems without wait-state insertion. |
| Page Write Cycle Time | 10 ms maximum (standard); reduces firmware update latency vs. byte-by-byte programming - critical for field-upgradable embedded devices. |
| Supply Voltage | 5 V ±10%; compatible with standard TTL/CMOS logic families and legacy 5 V system rails without level-shifting. |
| Standby Current | 100 µA typical (CMOS); supports low-power operation in battery-backed or energy-sensitive applications like metering or sensor nodes. |
| Endurance & Retention | 100,000 write/erase cycles; 10-year data retention; validated for long-life industrial deployments requiring infrequent but reliable nonvolatile updates. |
| Operating Temperature | –40°C to +85°C; qualified for industrial environments including factory automation, motor drives, and outdoor telemetry equipment. |
Pinout & Package
AT28C64B-15JI is supplied in a 32-lead Plastic J-Leaded Chip Carrier (PLCC) package per JEDEC MS-016, Variation AE. Pins 1 and 17 are designated "Don't Connect" (DC) and must remain unconnected per datasheet specification.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus selecting one of 8,192 memory locations; A6–A12 define page boundaries for 64-byte page writes. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel data path for read/write; supports DATA polling (I/O7) and toggle bit (I/O6) for write status monitoring. |
| CE | Chip Enable | Active-low chip select; when high, forces outputs to high-impedance and inhibits all writes - essential for bus isolation in multi-device systems. |
| OE | Output Enable | Active-low output control; allows read access while CE is low; OE high disables outputs even during valid CE/WE states. |
| WE | Write Enable | Active-low write strobe; initiates byte or page write; combined with CE and OE logic to define six distinct operational modes including standby and write inhibit. |
| VCC / GND | Power Supply | Single 5 V ±10% supply with dedicated ground; no separate VPP required for normal operation (12 V only for chip erase or device ID programming). |
| NC / DC | No Connect / Don't Connect | Pins marked NC or DC (e.g., PLCC pins 1 and 17) must be left floating - connection risks functional failure or latch-up. |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-Wide Pinout | Direct drop-in compatibility with industry-standard 28-pin and 32-pin parallel memory sockets, minimizing PCB redesign in legacy upgrades. |
| Software Data Protection (SDP) | User-configurable write lock via 3-byte command sequence (AAh/55h/A0h); prevents accidental overwrites during power transitions without hardware modification. |
| Automatic Page Write | Internal latching of up to 64 bytes with automatic timing - eliminates need for external write controllers or microcontroller timing loops during bulk programming. |
| DATA Polling & Toggle Bit | Dual, pin-level write completion detection (I/O7 complement, I/O6 toggle) enables deterministic polling without fixed delays or external timers. |
| Industrial Temperature Range | –40°C to +85°C operation validated across full voltage and timing specs - suitable for under-hood automotive ECUs and industrial PLC modules. |
Applications
| Industrial PLC Configuration Storage | Firmware Boot Loader Memory |
|---|---|
Use Scenario: Storing user-defined I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed at power-up and runtime via parallel bus; retains settings across 10+ year service life. Use Value: Eliminates need for battery-backed SRAM; 100,000-cycle endurance supports frequent parameter updates during commissioning and maintenance. |
Use Scenario: Holding bootloader code and secure boot keys in microcontroller-based edge gateways requiring authenticated firmware updates. IC Role / Device Role / Timing Role: Primary boot memory mapped into CPU address space; 150 ns access ensures zero-wait-state execution during cold start. Use Value: Software data protection prevents corruption during brown-out events; 12 V device ID area stores unique serial numbers for traceability. |
| Metering Calibration Data Retention | Legacy Industrial Instrumentation |
Use Scenario: Preserving factory-calibrated ADC offset/gain coefficients and tamper-detection logs in smart electricity/water meters operating for 15+ years. IC Role / Device Role / Timing Role: High-reliability data archive with 10-year retention guarantee; accessed only during calibration or diagnostics. Use Value: 100 µA standby current extends battery life in sealed, maintenance-free meters; page write reduces calibration time by >90% vs. byte writes. |
Use Scenario: Replacing obsolete UV-erasable EPROMs (e.g., 27C64) in aging CNC machine controllers and test equipment where board space and pinout are fixed. IC Role / Device Role / Timing Role: Pin-compatible parallel memory with identical 32-lead PLCC footprint and JEDEC-compliant signal mapping. Use Value: No PCB rework required; 5 V-only operation removes need for +12 V programming supplies; in-system reprogramming simplifies field service. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Microchip 28C64C-15/JI | Same 64 Kbit organization, 150 ns access, PLCC-32, industrial temp; requires 12 V VPP for write (not 5 V only like AT28C64B-15JI). | Lacks software data protection; relies solely on hardware write inhibit; no toggle bit support. | Choose when VPP infrastructure exists and SDP is unnecessary; avoid if 5 V-only simplicity or robust write-status feedback is required. |
| ON Semiconductor CAT28C64BI-15 | Pinout-compatible 64 Kbit EEPROM; 150 ns access; 100 µA standby; but only supports byte write (no page write) and lacks DATA polling. | Requires microcontroller to manage individual byte writes - increases firmware complexity and update time for >1 KB data. | Select for cost-sensitive designs where page write speed and deterministic write completion detection are not critical. |
Compared with Microchip 28C64C-15/JI and ON Semiconductor CAT28C64BI-15, the AT28C64B-15JI uniquely combines 5 V-only operation, page write acceleration, software data protection, and dual-mode write completion signaling - making it optimal for upgrade paths from EPROM and for safety-critical configuration storage.
Availability
AT28C64B-15JI is available at Aetrix Electronics and suitable for industrial PLC configuration storage, firmware boot loader memory, and metering calibration data retention requiring stable component supply, long-term lifecycle assurance, and guaranteed industrial temperature performance.
Supply support for AT28C64B-15JI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and security ICs, with a legacy of high-reliability industrial and automotive-grade products.
The AT28C64B belongs to Atmel's parallel EEPROM product line, designed specifically for seamless migration from EPROM and battery-backed SRAM in legacy 8-bit and 16-bit embedded systems requiring field-upgradable, long-retention nonvolatile storage.
FAQ
What is the maximum read access time specified for the AT28C64B-15JI?
The AT28C64B-15JI has a maximum read access time of 150 ns, as confirmed by its speed grade suffix "-15". This value is measured under standard conditions (VCC = 5 V ±10%, TA = –40°C to +85°C) and applies to both commercial and industrial versions. The AT28C64B-15JI achieves this timing without external wait-state generation, enabling direct interface with fast 8051, Z80, or 68K-family microcontrollers.
Does the AT28C64B-15JI require a 12 V programming voltage for normal write operations?
No, the AT28C64B-15JI performs all standard byte and page writes using only a 5 V ±10% supply. A 12 V ±0.5 V voltage is required exclusively for chip erase or programming the 64-byte device identification area (addresses 1FC0H–1FFFH), not for routine firmware or configuration updates. This 5 V-only operation simplifies power design and eliminates the need for charge pumps or external VPP generators in most applications.
How does software data protection (SDP) work on the AT28C64B-15JI?
Software data protection on the AT28C64B-15JI is enabled by writing a specific 3-byte sequence (AAh to address 1555h, 55h to 0AAAh, then A0h to 1555h) followed by any data write. Once activated, subsequent writes require repeating this sequence before data. The AT28C64B-15JI ships with SDP disabled, and the feature remains active across power cycles. Disabling uses a different 5-byte sequence (AAh/55h/80h/AAh/20h), also documented in the official datasheet.
Can the AT28C64B-15JI be used as a direct replacement for the AT28C64B-15JC in a commercial-temperature design?
Yes - the AT28C64B-15JI and AT28C64B-15JC share identical electrical specifications, timing parameters (including 150 ns access), pinout, and package footprint (32J PLCC). The only difference is temperature rating: AT28C64B-15JI is rated for –40°C to +85°C, while AT28C64B-15JC is rated for 0°C to +70°C. Using the AT28C64B-15JI in a commercial design imposes no functional penalty and provides extended thermal margin.
What package type is used for the AT28C64B-15JI, and are there any special layout requirements?
The AT28C64B-15JI uses a 32-lead Plastic J-Leaded Chip Carrier (PLCC) package (package code 32J). Critical layout requirements include leaving pins 1 and 17 unconnected ("Don't Connect"), maintaining proper thermal relief for the center pad (if present), and adhering to JEDEC MS-016, Variation AE mechanical dimensions. The PLCC body size is 12.5 mm × 15.0 mm, with 1.27 mm lead pitch - standard for automated placement and reflow.
AT28C64B-15JI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 150 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT28C64B-15JI FAQ
1.How can I place an order for AT28C64B-15JI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64B-15JI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64B-15JI reliable?
The price and inventory of AT28C64B-15JI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64B-15JI is usually 5 days.
3.What payment methods are accepted for AT28C64B-15JI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64B-15JI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64B-15JI?
AT28C64B-15JI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64B-15JI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64B-15JI?
For technical support, including AT28C64B-15JI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64B-15JI requirements.
6.How does Aetrix verify that AT28C64B-15JI is sourced from the original manufacturer or authorized distributors?
All AT28C64B-15JI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64B-15JI meets industry standards.
7.What is the process for return or replacement of AT28C64B-15JI?
All AT28C64B-15JI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64B-15JI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64B-15JI part is unused and in its original packaging.
Return procedure for AT28C64B-15JI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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