Microchip Technology AT28C64B-15SI

Overview

AT28C64B-15SI from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 150 ns read access time, single 5 V ±10% supply, and hardware/software data protection - used for nonvolatile storage in industrial control firmware, BIOS configuration, and embedded system parameter retention.

For engineers reviewing the AT28C64B-15SI datasheet, AT28C64B-15SI pinout, AT28C64B-15SI application, or AT28C64B-15SI equivalent, key selection considerations include page write capability (1–64 bytes), DATA polling/toggle bit end-of-write detection, CMOS/TTL compatibility, industrial temperature range (−40°C to +85°C), and software data protection enable/disable sequences.

Technical Context

The AT28C64B-15SI operates as a parallel-access EEPROM with static RAM-like read/write interface logic, requiring no external timing components. It integrates an internal 64-byte page register that latches address and data during page write operations, enabling up to 64 bytes to be written in a single internal programming cycle.

Write completion is signaled via DATA polling on I/O7 (complement-to-data during write, true data after completion) or toggle-bit behavior on I/O6. Hardware protection includes VCC sense (<3.8 V inhibits writes), 5 ms power-on delay, and noise filtering on WE/CE inputs; software protection uses a three-byte command sequence to enable/disable write lock.

Key Specifications

Pinout & Package

AT28C64B-15SI is supplied in a 28-lead SOIC (28S) package per JEDEC MS-013, with 300-mil body width, gull-wing leads, and standard 1.27 mm pitch. Pin 1 is marked by a notch or dot; pins 1–14 and 15–28 are arranged along opposite long edges.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar parallel EEPROM applications.

Compared with ST M28W640ECB90N6 and Microchip 25LC640A-I/SN, the AT28C64B-15SI uniquely delivers 5 V parallel interface, JEDEC pinout, hardware+software write protection, and deterministic page write - making it irreplaceable in retrofitting or maintaining legacy industrial control hardware.

Availability

AT28C64B-15SI is available at Aetrix Electronics and suitable for industrial PLCs, legacy BIOS platforms, and embedded motor drives requiring stable component supply, long-lifecycle support, and guaranteed industrial temperature qualification.

Supply support for AT28C64B-15SI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.

The AT28C64B product line was designed for 5 V parallel EEPROM replacement in industrial, automotive, and computing applications where pin compatibility, write endurance, and deterministic write verification are critical.

FAQ

What is the maximum page write size supported by the AT28C64B-15SI?

The AT28C64B-15SI supports a maximum page write size of 64 bytes. This is implemented via an internal 64-byte page register that latches address and data during a single write cycle. All bytes written in one page operation must reside on the same page, defined by identical states on address pins A6–A12. The AT28C64B-15SI enforces this boundary strictly - exceeding the 64-byte limit or crossing page boundaries terminates the operation and initiates internal programming.

How does DATA polling work on the AT28C64B-15SI during a write cycle?

During a write cycle, reading the last-written byte from the AT28C64B-15SI returns the complement of the stored data on I/O7 until the write completes. Once the internal programming finishes, I/O7 outputs the true data value. This behavior allows firmware to poll I/O7 in a loop without fixed timeouts - the transition from complement to true data signals write completion. The AT28C64B-15SI guarantees this polling mechanism works for both byte and page writes.

Can the AT28C64B-15SI operate reliably at 5 V ±10% across its full industrial temperature range?

Yes. The AT28C64B-15SI is fully specified for operation at 5 V ±10% (4.5 V to 5.5 V) over the industrial temperature range of −40°C to +85°C. Its DC characteristics - including input thresholds (VIL = 0.8 V, VIH = 2.0 V), output drive (VOL = 0.4 V at 2.1 mA), and standby current (≤100 µA) - are all tested and guaranteed across this range. The AT28C64B-15SI's VCC sense circuitry also remains functional at the lower supply limit to prevent inadvertent writes.

What is the purpose of the extra 64 bytes of EEPROM in the AT28C64B-15SI?

The AT28C64B-15SI includes an additional 64 bytes of EEPROM accessible only when A9 is raised to 12.0 V ±0.5 V and addresses 1FC0H–1FFFH are used. These bytes are intended for device identification, calibration data, or manufacturing traceability - separate from the main 64 Kbit array. They retain data for 10 years and support the same 100,000-cycle endurance as the primary memory. The AT28C64B-15SI requires the elevated A9 voltage to prevent accidental writes during normal 5 V operation.

Is the AT28C64B-15SI pin-compatible with older 28C64 variants like the AT28C64A?

Yes - the AT28C64B-15SI maintains full JEDEC-standard byte-wide pinout compatibility with the AT28C64A and industry-standard 27C64 EPROMs. Pin functions (A0–A12, I/O0–I/O7, CE, OE, WE, VCC, GND) match exactly across all packages (SOIC, PDIP, PLCC, TSOP). The AT28C64B-15SI improves upon the AT28C64A with faster 150 ns access, enhanced software data protection, and tighter endurance/reliability specs - but requires no PCB changes for drop-in replacement.