Microchip Technology AT28C64E-15SI

Overview

AT28C64E-15SI from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 150 ns read access time, 200 µs fast byte write cycle, and industrial temperature range (–40°C to +85°C). It operates from a single 5V ±10% supply, supports READY/BUSY and DATA polling for write completion detection, and is used in firmware storage, configuration memory, and boot code retention in embedded controllers.

For engineers reviewing the AT28C64E-15SI datasheet, AT28C64E-15SI pinout, AT28C64E-15SI application, or AT28C64E-15SI equivalent, key selection criteria include its 200 µs write time versus standard 1 ms variants, CMOS standby current of 100 µA, self-timed internal write control, and compatibility with microprocessor bus interfaces without external timing logic.

Technical Context

The AT28C64E-15SI implements a self-timed byte write architecture with internal address/data latches and an on-chip control timer that automatically clears and rewrites each byte. Its RDY/BUSY open-drain output and I/O7 data polling provide two hardware-synchronized methods to detect write completion without busy-waiting.

It uses Atmel's nonvolatile EEPROM technology with error correction for enhanced endurance (10⁵ cycles) and 10-year data retention. The device includes VCC sense, power-on delay, and input-level write inhibit to prevent inadvertent writes - all fully compatible with TTL and CMOS logic levels.

Key Specifications

Pinout & Package

AT28C64E-15SI is supplied in a 28-lead SOIC (28S) package per JEDEC MS-012, with 300-mil width and gull-wing leads. Pin 1 is RDY/BUSY (open-drain), and pins 17–18 are NC/DC per PLCC variant - but in SOIC, all 28 pins are functional as defined below.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar parallel EEPROM applications.

Compared with AT28C64B-15SI, the AT28C64E-15SI delivers 5× faster writes and 10× higher endurance - critical for dynamic configuration logging. Versus ST M28W640ECB90N6, it offers plug-compatible 28-pin SOIC layout and single-supply operation, avoiding VPP complexity and PCB redesign.

Availability

AT28C64E-15SI is available at Aetrix Electronics and suitable for industrial control systems, legacy computing platforms, and automotive body electronics requiring stable component supply, long-term lifecycle support, and verified second-source alternatives.

Supply support for AT28C64E-15SI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.

The AT28C64E-15SI belongs to Atmel's parallel EEPROM product line, designed for direct microprocessor bus interfacing in systems requiring reliable, in-system programmable nonvolatile storage without external timing components.

FAQ

What is the maximum write cycle time for AT28C64E-15SI?

The AT28C64E-15SI has a maximum byte write cycle time of 200 µs, enabled by its internal self-timed write controller. This is significantly faster than the standard AT28C64B variant (1 ms), allowing full 64 Kbit rewrite in approximately 1.6 seconds. The specification is guaranteed across the industrial temperature range (–40°C to +85°C) and under 5V ±10% supply conditions. AT28C64E-15SI does not require external timing components to achieve this performance.

Does AT28C64E-15SI require a 12V programming voltage?

No, AT28C64E-15SI operates from a single 5V ±10% supply and does not require a 12V VPP voltage for normal read or write operations. The 12V level is only used optionally for CHIP CLEAR (via OE pin) or DEVICE IDENTIFICATION (via A9 pin) - both are infrequent, factory-level functions. All standard byte writes and reads use only the 5V VCC rail, simplifying power design and eliminating need for charge pumps or external high-voltage generators.

How is write completion detected on AT28C64E-15SI?

AT28C64E-15SI provides two independent, hardware-synchronized methods: (1) RDY/BUSY pin (Pin 1), an open-drain output pulled low during write and released high upon completion; and (2) DATA polling of I/O7, which returns the complement of written data until the write finishes, then returns true data. Both methods are fully functional in the AT28C64E-15SI SOIC package and require no additional timing components. AT28C64E-15SI supports interrupt-driven or polling-based firmware implementations.

What is the endurance rating of AT28C64E-15SI?

The AT28C64E-15SI is rated for 100,000 (10⁵) write/erase cycles per memory location, confirmed by Atmel's characterization and qualification testing. This high endurance is achieved through internal error correction and optimized tunnel oxide stress management. It exceeds the 10,000-cycle rating of the base AT28C64B variant and supports applications involving frequent field updates - such as logging, calibration storage, or adaptive configuration - over extended service life. AT28C64E-15SI maintains this rating across its full industrial temperature range.

Is AT28C64E-15SI pin-compatible with standard 28-pin parallel EEPROMs?

Yes, AT28C64E-15SI uses the JEDEC-approved byte-wide 28-pin SOIC pinout, matching industry-standard 28-pin parallel EEPROMs and EPROMs (e.g., 27C64, AT28C64B). Pin assignments for A0–A12, I/O0–I/O7, CE, OE, WE, VCC, GND, and RDY/BUSY are identical. No PCB layout changes are needed when upgrading from AT28C64B-15SI or similar JEDEC-compliant devices - the AT28C64E-15SI drops into the same footprint with enhanced write performance and endurance.