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Microchip Technology AT28C64E-20JC
- Part No.:
- AT28C64E-20JC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT28C64E-20JC.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 32PLCC
- Quantity:
- Payment:
- Shipping:
Inventory:3,541
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Product details
Overview
AT28C64E-20JC from Microchip Technology (formerly Atmel) is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 200 ns read access time, 200 µs fast byte write cycle, and CMOS/TTL-compatible I/O for direct microprocessor interfacing in embedded control and firmware storage applications.
For engineers reviewing the AT28C64E-20JC datasheet, AT28C64E-20JC pinout, AT28C64E-20JC application, or AT28C64E-20JC equivalent, key selection considerations include its industrial temperature range (–40°C to +85°C), RDY/BUSY and DATA polling write completion detection, self-timed write with internal latches, 100K endurance, and PLCC-32 packaging for high-reliability board-level reprogrammability.
Technical Context
The AT28C64E-20JC implements a self-timed byte write architecture with internal address/data latching, automatic clear-before-write, and an integrated control timer-eliminating external timing logic. It supports standard SRAM-like read/write bus protocols without wait-state generation.
Its dual write-detection methods-open-drain RDY/BUSY output (pin 1) and DATA polling on I/O7-enable flexible system-level synchronization. The device enforces VCC sense (≥3.8 V), 5 ms power-on delay, and CE/OE/WE state validation to prevent inadvertent writes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits); sufficient for boot code, calibration data, or configuration tables in resource-constrained systems |
| Read Access Time | 200 ns max; enables direct connection to 5 MHz microprocessor buses without wait states |
| Byte Write Time | 200 µs max (AT28C64E variant); reduces full-memory rewrite to ≤1.6 seconds vs. 1 ms in standard version |
| Endurance | 100,000 write/erase cycles; supports field-updatable firmware or frequent parameter logging |
| Data Retention | 10 years at +85°C; validated for long-life industrial deployments without refresh |
| Supply Voltage | 5 V ±10%; compatible with legacy 5 V logic families and mixed-voltage board designs |
| Standby Current | 100 µA typical (CMOS mode); critical for low-power sleep modes in battery-backed systems |
Pinout & Package
AT28C64E-20JC is packaged in a 32-lead Plastic J-Leaded Chip Carrier (PLCC-32), JEDEC MS-016AE compliant, with 1.27 mm pitch and surface-mount footprint. Pin 1 is RDY/BUSY (open-drain), and pins 1 & 17 are designated "Don't Connect" per PLCC package specification.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; TTL/CMOS compatible |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; supports true read/write data flow with high-impedance tri-state during deselect |
| CE | Chip Enable | Active-low chip select; enables memory access only when asserted with OE low and WE high (read) or low (write) |
| OE | Output Enable | Active-low output gate; controls data bus drive during read; must be high during write |
| WE | Write Enable | Active-low write strobe; latches address/data on falling/rising edges; initiates self-timed internal write sequence |
| RDY/BUSY | Open-Drain Status Output | Pulled low during write; released high at completion; supports wired-OR multi-device status bus |
| VCC, GND | Power Supply | Single 5 V supply; decoupling required within 10 mm of pins 16 (VCC) and 32 (GND) |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed byte write | Eliminates external timing circuitry; internal control timer ensures reliable 200 µs write completion independent of host clock |
| RDY/BUSY + DATA polling | Dual asynchronous write-completion detection: hardware interrupt via open-drain pin or software-pollable I/O7 bit inversion |
| VCC write protection | Hardware-enforced lockout below 3.8 V and 5 ms power-on delay prevent corruption during brown-out or power ramp |
| JEDEC byte-wide pinout | Drop-in compatibility with industry-standard EPROM/EEPROM sockets and PCB layouts across PDIP, SOIC, TSOP, and PLCC packages |
| Industrial temperature range | –40°C to +85°C operation validated per AC/DC specs; suitable for automotive control modules and factory automation hardware |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in harsh factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration register bank accessed via 8-bit parallel bus during boot and runtime updates. Use Value: 100K endurance and 10-year retention ensure reliable recalibration over equipment lifetime without battery backup. |
Use Scenario: Holding patient-specific calibration coefficients and sensor offset values in portable diagnostic instruments requiring FDA-compliant data integrity. IC Role / Device Role / Timing Role: Secure, tamper-resistant firmware parameter store with VCC-sense write lockout preventing corruption during battery swaps. Use Value: RDY/BUSY signaling enables deterministic update timing critical for audit-trail compliance in Class II medical devices. |
| Automotive Body Control Module | Test Equipment Firmware Patching |
Use Scenario: Storing seat/mirror position presets, lighting profiles, and CAN node configuration in 12 V automotive body electronics. IC Role / Device Role / Timing Role: Parallel EEPROM interfaced directly to 8051 or similar MCU for zero-wait-state reads and controlled write sequencing. Use Value: Industrial-grade temperature rating and 5 V ±10% tolerance accommodate vehicle electrical system transients and thermal cycling. |
Use Scenario: Field-updating calibration constants and test algorithm revisions in automated benchtop test systems without firmware reflashing. IC Role / Device Role / Timing Role: In-system reprogrammable memory accessed via dedicated test controller bus for secure, versioned patch management. Use Value: Fast 200 µs byte writes enable sub-second firmware patch application, minimizing production line downtime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-20JC | Same PLCC-32 package and 200 ns speed grade, but standard 10K endurance and 1 ms write time; lacks E-grade reliability features | Suitable for cost-sensitive, low-update-frequency applications where 100K cycles not required | Select AT28C64B-20JC only if field update frequency is <100 cycles/year and full 10-year retention under thermal stress is not mandated |
| ST M48T02-20J6 | Real-time clock + 2 Kbit NV SRAM hybrid; no EEPROM architecture; requires external battery and separate RTC interface | Used where time-stamped logging or battery-backed volatile storage is primary need-not for firmware/config storage | Choose ST M48T02-20J6 only when integrated RTC functionality is essential and parallel EEPROM interface is secondary |
Compared with AT28C64B-20JC, the AT28C64E-20JC delivers 10× higher endurance and 5× faster writes-critical for dynamic configuration systems-while ST M48T02-20J6 trades nonvolatile program storage capability for timekeeping, making it unsuitable as a functional replacement.
Availability
AT28C64E-20JC is available at Aetrix Electronics and suitable for industrial control, medical instrumentation, automotive body electronics, and test equipment requiring stable component supply, long-term lifecycle support, and guaranteed PLCC-32 packaging consistency.
Supply support for AT28C64E-20JC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, datasheet documentation, and manufacturing continuity for the AT28C64 family.
The AT28C64 series was designed as a drop-in, pin-compatible EEPROM upgrade path for legacy EPROM-based systems-enabling in-circuit reprogramming without board redesign or voltage-programming hardware.
FAQ
What is the maximum operating temperature range for the AT28C64E-20JC?
The AT28C64E-20JC is rated for industrial temperature operation from –40°C to +85°C. This range is validated across all DC and AC specifications-including read access time, write timing, and standby current-and applies specifically to the JC (PLCC-32) package variant. The device meets these limits without derating and is qualified per AEC-Q100 stress test conditions for automotive-adjacent use cases.
Does the AT28C64E-20JC require external high-voltage programming circuitry?
No, the AT28C64E-20JC operates exclusively from a single 5 V ±10% supply and does not require external 12 V programming voltages during normal byte write operations. High-voltage (12 V) is only used for optional CHIP CLEAR or DEVICE IDENTIFICATION functions-neither is needed for standard read/write cycles. All self-timed writes execute using internal charge pumps powered by VCC.
How does write protection work on the AT28C64E-20JC?
The AT28C64E-20JC implements three hardware-level write protections: (1) VCC sense disables writes if supply drops below ~3.8 V; (2) a 5 ms internal power-on delay prevents writes until VCC stabilizes; and (3) write inhibition occurs if CE is high, OE is low, or WE is high-ensuring only valid CE=low/OE=high/WE=low sequences initiate writes. These are hardwired logic functions, not software-configurable.
Can the AT28C64E-20JC be used as a direct replacement for the AT28C64-20JC?
Yes-the AT28C64E-20JC is a functionally enhanced, pin-compatible replacement for the AT28C64-20JC. Both share identical PLCC-32 pinout, 200 ns read timing, 5 V supply, and industrial temperature rating. The "E" suffix denotes higher endurance (100K vs. 10K cycles) and faster write time (200 µs vs. 1 ms), with no changes to interface logic, timing diagrams, or PCB layout requirements.
What is the purpose of the RDY/BUSY pin on the AT28C64E-20JC?
The RDY/BUSY pin (Pin 1) on the AT28C64E-20JC is an open-drain output that actively pulls low during any self-timed byte write cycle and releases high-Z (or pulled up externally) upon completion. It enables hardware handshaking-allowing the host microprocessor to pause execution or service other tasks while the EEPROM internally clears and programs the cell-without polling overhead or bus contention.
AT28C64E-20JC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 200µs
- Access Time:
- 200 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT28C64E-20JC FAQ
1.How can I place an order for AT28C64E-20JC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64E-20JC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64E-20JC reliable?
The price and inventory of AT28C64E-20JC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64E-20JC is usually 5 days.
3.What payment methods are accepted for AT28C64E-20JC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64E-20JC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64E-20JC?
AT28C64E-20JC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64E-20JC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64E-20JC?
For technical support, including AT28C64E-20JC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64E-20JC requirements.
6.How does Aetrix verify that AT28C64E-20JC is sourced from the original manufacturer or authorized distributors?
All AT28C64E-20JC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64E-20JC meets industry standards.
7.What is the process for return or replacement of AT28C64E-20JC?
All AT28C64E-20JC units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64E-20JC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64E-20JC part is unused and in its original packaging.
Return procedure for AT28C64E-20JC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28C64E-20JC Tags
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