Microchip Technology AT28C64E-20PC

Overview

AT28C64E-20PC from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with 200 ns read access time, 200 µs fast byte write cycle, and CMOS/TTL-compatible I/O. It operates at 5V ±10%, supports commercial temperature range (0°C to 70°C), and features READY/BUSY output and DATA polling for write completion detection - used in embedded system configuration storage and firmware parameter retention.

For engineers reviewing the AT28C64E-20PC datasheet, AT28C64E-20PC pinout, AT28C64E-20PC application, or AT28C64E-20PC equivalent, key selection criteria include its JEDEC-standard 28-pin PDIP package, self-timed write architecture, VCC-sense write protection, chip erase capability via 12V OE, and 100,000-cycle endurance rating.

Technical Context

The AT28C64E-20PC implements a parallel interface with address latching on WE/CE falling edge and data latching on rising edge, enabling microprocessor-like SRAM-style access. Its internal control timer manages automatic clear-before-write and write timing without external circuitry.

It supports two write detection methods: open-drain RDY/BUSY level signaling (pin 1) and DATA polling of I/O7 complement behavior during writes. Write inhibition is enforced by VCC sense (<3.8V), 5 ms power-on delay, and logic-level gating (OE high, CE high, or WE high).

Key Specifications

Pinout & Package

AT28C64E-20PC uses a 28-lead, 0.600" wide plastic DIP (PDIP) package per JEDEC MS-011 AB, with pin 1 designated as RDY/BUSY (open-drain) and pins 17–18 unused (NC/DC) in PLCC variants - not applicable here.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar parallel EEPROM applications.

Compared with AT28C64B-20PC, the AT28C64E-20PC delivers 10× higher endurance and 5× faster writes, while MX28LV640E-20PC trades 5V simplicity for lower power and newer process technology - making AT28C64E-20PC optimal for legacy 5V systems needing robust field update capability.

Availability

AT28C64E-20PC is available at Aetrix Electronics and suitable for industrial PLCs, legacy microcontroller platforms, and medical calibration systems requiring stable component supply, long-lifecycle support, and guaranteed 5V parallel EEPROM functionality.

Supply support for AT28C64E-20PC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for industrial, automotive, and consumer applications.

The AT28C64E-20PC belongs to Atmel's parallel EEPROM product line, designed specifically for drop-in SRAM replacement in 5V embedded systems requiring reliable, field-updatable nonvolatile storage without external timing components.

FAQ

What is the maximum operating temperature range for the AT28C64E-20PC?

The AT28C64E-20PC is rated for commercial temperature operation from 0°C to 70°C. Its datasheet specifies this range explicitly for all speed grades including the -20 variant, and it uses a PDIP package optimized for through-hole mounting in ambient-controlled environments. The industrial-grade counterpart is designated AT28C64E-20PI, not AT28C64E-20PC. AT28C64E-20PC must not be operated outside 0°C–70°C to maintain specified timing and endurance.

Does the AT28C64E-20PC support both RDY/BUSY and DATA polling for write completion detection?

Yes, the AT28C64E-20PC supports both methods: pin 1 functions as an open-drain RDY/BUSY output that goes low during write and releases high upon completion, and DATA polling monitors I/O7 - which returns the complement of written data until the write finishes, then outputs true data. Both mechanisms are fully functional in the AT28C64E-20PC and documented in its AC write characteristics table.

What is the purpose of the 32-byte ID area in the AT28C64E-20PC?

The AT28C64E-20PC includes 32 bytes of additional EEPROM space at addresses 1FE0H–1FFFH, accessible by raising A9 to 12V ±0.5V. This area is intended for user-defined data such as device serial numbers, calibration timestamps, or firmware version identifiers - separate from the main 8K×8 array to avoid interference with operational memory. It is electrically identical in endurance and retention to the primary array.

How does write protection work on the AT28C64E-20PC?

The AT28C64E-20PC implements three-tiered write protection: (1) VCC sense disables writes if supply drops below ~3.8V; (2) a 5 ms internal power-on delay prevents writes during voltage ramp-up; and (3) logic-level gating - holding OE high, CE high, or WE high blocks all write cycles. These protections are inherent to the AT28C64E-20PC silicon and require no external components.

Can the AT28C64E-20PC be used as a direct replacement for standard SRAM in existing designs?

Yes, the AT28C64E-20PC is designed for SRAM-like read/write access: reads occur with CE and OE low and WE high; writes use standard microprocessor bus timing with address/data latched internally. Its JEDEC-approved pinout matches common 28-pin SRAMs, and 200 ns access allows direct substitution in 5 MHz bus systems - though write cycles require explicit handling via RDY/BUSY or DATA polling, unlike volatile RAM.