Microchip Technology AT28C64E-20PI
- Part No.:
- AT28C64E-20PI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-DIP (0.600", 15.24mm)
- Datasheet:
-
AT28C64E-20PI.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28DIP
- Quantity:
- Payment:

- Shipping:

Inventory:4,802
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT28C64E-20PI from Atmel is a 64K-bit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 200 µs fast byte write time, 120 ns read access, and CMOS/TTL-compatible I/O - used in microcontroller-based firmware storage, BIOS configuration backup, and industrial control parameter retention.
For engineers reviewing the AT28C64E-20PI datasheet, AT28C64E-20PI pinout, AT28C64E-20PI application, or AT28C64E-20PI equivalent, key selection criteria include write endurance (10⁵ cycles), RDY/BUSY signaling capability, DATA polling support, 5V ±10% supply tolerance, and industrial temperature range (-40°C to +85°C) compliance.
Technical Context
The AT28C64E-20PI operates as a drop-in SRAM-compatible nonvolatile memory: reads require CE and OE low with WE high; writes initiate on falling WE (or CE) edge, latching address and data internally. Its self-timed write cycle includes automatic erase-before-write and internal control timing - eliminating external timing circuitry.
Two hardware-level write completion detection methods are supported: open-drain RDY/BUSY output (pin 1, active-low during write) and DATA polling via I/O7 complement behavior. Write protection is enforced by VCC sense (<3.8V inhibition), 5 ms power-on delay, and logic-level inhibit conditions (OE low, CE high, or WE high).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits) - supports full system configuration storage without external address multiplexing |
| Read Access Time | 200 ns max - compatible with 5 MHz bus timing in microcontroller systems |
| Byte Write Time | 200 µs max - enables full device rewrite in ≤1.6 seconds for field firmware updates |
| Endurance | 100,000 write/erase cycles - suitable for applications requiring frequent parameter logging or calibration updates |
| Data Retention | 10 years at +85°C - ensures long-term reliability in industrial embedded environments |
| Supply Voltage | 5V ±10% - interoperable with legacy 5V logic families and mixed-voltage board designs |
| Operating Temp | -40°C to +85°C - qualified for industrial control, automotive body electronics, and telecom infrastructure |
| Standby Current | 100 µA (CMOS) - enables low-power operation in battery-backed or energy-constrained systems |
Pinout & Package
AT28C64E-20PI is supplied in a 28-lead plastic DIP (PDIP) package (package code P6), 0.600" wide, with JEDEC MS-011 AB compliance and through-hole mounting compatibility.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing without external decoding |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface compatible with 8-bit microcontrollers and bus controllers |
| CE | Chip Enable | Active-low chip select enabling multi-device memory mapping and bus arbitration |
| OE | Output Enable | Active-low read strobe; controls output driver enable independently of CE for flexible bus control |
| WE | Write Enable | Active-low write strobe; initiates self-timed byte write on falling edge with internal latching |
| RDY/BUSY | Open-Drain Status Output | Active-low signal indicating write in progress; supports wired-OR connection across multiple devices |
| VCC | Power Supply | +5V ±10% supply input; powers core logic and I/O buffers |
| GND | Ground Reference | Common return path for all digital signals and power domains |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed Byte Write | Eliminates need for external write timing circuitry; internal control timer manages erase-and-program sequence automatically |
| RDY/BUSY Output | Hardware handshake signal reduces software overhead during write operations; enables deterministic interrupt-driven write completion handling |
| DATA Polling Support | Allows polling-based write completion detection without dedicated status pin - critical for space-constrained PCB layouts |
| VCC Sense Protection | Prevents inadvertent writes during power-up/down transients by disabling write function below 3.8V typical threshold |
| Extra 32-Byte ID Area | User-accessible EEPROM region (1FE0H–1FFFH) for device serialization, calibration data, or firmware version tracking |
| JEDEC Byte-Wide Pinout | Ensures direct compatibility with existing SRAM-based memory interfaces and legacy board designs |
Applications
| Industrial PLC Configuration Storage | Legacy PC BIOS Parameter Backup |
|---|---|
Use Scenario: Storing user-defined I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers operating in harsh factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed during boot and runtime via 8-bit parallel bus; retains settings across power cycles and brownouts. Use Value: 100,000-cycle endurance and 10-year data retention ensure reliable operation over 10+ years of continuous industrial deployment without recalibration. |
Use Scenario: Preserving CMOS setup values (date/time, boot order, peripheral enables) in desktop and server motherboards using legacy ISA/LPC bus interfaces. IC Role / Device Role / Timing Role: Direct-replacement SRAM-equivalent NVRAM providing transparent read/write access with no software driver changes required. Use Value: 200 ns read access and JEDEC pinout allow drop-in replacement of obsolete 28C64 variants without PCB redesign or firmware modification. |
| Telecom Line Card Calibration Memory | Automotive Body Control Module Settings |
Use Scenario: Storing per-channel gain/offset compensation coefficients and firmware patch flags in DSLAM and optical line terminal equipment. IC Role / Device Role / Timing Role: High-reliability parameter storage accessed during initialization and dynamic reconfiguration; supports field updates via serial command interface. Use Value: RDY/BUSY signaling enables precise synchronization of calibration writes with DSP processing windows, avoiding bus contention or data corruption. |
Use Scenario: Retaining seat position memory, mirror fold/unfold preferences, and lighting profiles in vehicle body control units exposed to automotive temperature extremes. IC Role / Device Role / Timing Role: Industrial-grade EEPROM interfaced directly to 8-bit MCU via parallel bus; survives repeated cold cranking and thermal cycling. Use Value: -40°C to +85°C qualification and 100 µA standby current minimize battery drain during vehicle sleep mode while ensuring data integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-20PI | Lower endurance (10⁴ cycles); same 200 ns access, 200 µs write, and PDIP-28 package | Suitable only for infrequently updated configuration storage (e.g., one-time factory programming) | Select when cost sensitivity outweighs long-term field update requirements |
| MN6264L-20PL | Same 64K×8 organization and 200 ns access; 1 ms write time; TTL-compatible but not CMOS standby current optimized | Limited to commercial temp range (0°C to 70°C); higher 2 mA standby current | Choose only for legacy 5V-only systems where industrial temp rating is unnecessary |
Compared with AT28C64E-20PI, AT28C64B-20PI trades endurance for lower cost in static configuration roles, while MN6264L-20PL offers functional equivalence in benign environments but lacks industrial temperature support and low-power standby - making AT28C64E-20PI the sole choice for high-cycle, wide-temp, low-power embedded deployments.
Availability
AT28C64E-20PI is available at Aetrix Electronics and suitable for industrial control systems, legacy computing platforms, and automotive body electronics requiring stable component supply, long-lifecycle availability, and guaranteed traceable sourcing.
Supply support for AT28C64E-20PI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for embedded and industrial applications.
The AT28C64 family was designed as a pin-compatible, SRAM-transparent parallel EEPROM solution targeting firmware storage, configuration backup, and calibration data retention in resource-constrained 8-bit systems.
FAQ
What is the maximum write endurance specification for AT28C64E-20PI?
The AT28C64E-20PI is rated for 100,000 write/erase cycles - confirmed in the "Features" section and "DC Operating Range" table of the official Atmel datasheet (Rev. 0001H). This high endurance enables repeated field updates in applications like industrial controller calibration or telecom line card compensation coefficient storage. The "E" suffix explicitly denotes the 10⁵-cycle variant versus the standard 10⁴-cycle AT28C64B.
Does AT28C64E-20PI support both RDY/BUSY signaling and DATA polling for write completion detection?
Yes, AT28C64E-20PI supports both methods: RDY/BUSY is provided on pin 1 as an open-drain output that goes low during write execution and releases upon completion; DATA polling uses I/O7, which returns the complement of written data until the write finishes, then outputs true data. Both mechanisms are documented in the "Device Operation" section and validated for the AT28C64E variant.
What package type and lead count does AT28C64E-20PI use?
AT28C64E-20PI uses a 28-lead plastic dual in-line package (PDIP), designated as package code "P6" per Atmel's ordering information table. It measures 0.600" wide and conforms to JEDEC standard MS-011 AB. This through-hole package is widely used in industrial and legacy computing applications requiring mechanical robustness and hand-soldering compatibility.
Is AT28C64E-20PI compatible with 5V TTL and CMOS logic families?
Yes, AT28C64E-20PI features CMOS and TTL compatible inputs and outputs, as stated in the "Features" section. Input voltage thresholds meet TTL levels (VIL ≤ 0.8 V, VIH ≥ 2.0 V), and output drive strength supports 2.1 mA sink (VOL ≤ 0.45 V) and 400 µA source (VOH ≥ 2.4 V), ensuring interoperability with both 5V CMOS and legacy TTL microcontrollers and peripherals.
What is the operating temperature range specified for AT28C64E-20PI?
AT28C64E-20PI is rated for the industrial temperature range of -40°C to +85°C, as confirmed in the "DC and AC Operating Range" table under the "Ind." column for the "-20" speed grade. This specification applies to all package variants ending in "I", including the PDIP version denoted by "PI" in the part number AT28C64E-20PI.
AT28C64E-20PI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-DIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 200µs
- Access Time:
- 200 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 28-PDIP
AT28C64E-20PI FAQ
1.How can I place an order for AT28C64E-20PI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64E-20PI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64E-20PI reliable?
The price and inventory of AT28C64E-20PI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64E-20PI is usually 5 days.
3.What payment methods are accepted for AT28C64E-20PI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64E-20PI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64E-20PI?
AT28C64E-20PI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64E-20PI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64E-20PI?
For technical support, including AT28C64E-20PI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64E-20PI requirements.
6.How does Aetrix verify that AT28C64E-20PI is sourced from the original manufacturer or authorized distributors?
All AT28C64E-20PI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64E-20PI meets industry standards.
7.What is the process for return or replacement of AT28C64E-20PI?
All AT28C64E-20PI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64E-20PI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64E-20PI part is unused and in its original packaging.
Return procedure for AT28C64E-20PI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28C64E-20PI Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

