Microchip Technology AT28C64E-20SI
- Part No.:
- AT28C64E-20SI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28C64E-20SI.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:3,929
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT28C64E-20SI from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 200 µs fast byte write time, 200 ns read access, and industrial temperature range (–40°C to +85°C). It operates on 5V ±10%, supports READY/BUSY and DATA polling for write completion detection, and is used in firmware storage, configuration memory, and boot code retention in embedded controllers.
For engineers reviewing the AT28C64E-20SI datasheet, AT28C64E-20SI pinout, AT28C64E-20SI application, or AT28C64E-20SI equivalent, this page delivers verified timing specs, validated pin functions, confirmed industrial-grade reliability data (10⁵ endurance cycles, 10-year retention), and real-world substitution guidance - all grounded in Atmel's official documentation.
Technical Context
The AT28C64E-20SI implements self-timed byte write cycles using internal address/data latches and a control timer, eliminating external timing circuitry. Its CMOS/TTL-compatible I/O and dual-line chip enable (CE)/output enable (OE) control allow seamless integration into microprocessor buses without bus contention.
It features VCC-sense write protection (inhibits writes below 3.8 V), automatic 5 ms power-on delay before write enable, and supports CHIP CLEAR via 12 V on OE. The device includes 32 bytes of dedicated identification EEPROM at addresses 1FE0H–1FFFH, accessible with A9 = 12 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits); sufficient for small boot loaders or device configuration tables |
| Read Access Time | 200 ns max; enables direct replacement of SRAM in legacy 8-bit systems without wait-state insertion |
| Byte Write Time | 200 µs max (AT28C64E variant); reduces full-memory reprogramming time to ≤1.6 seconds |
| Endurance | 100,000 write/erase cycles; supports field-upgradable firmware with frequent parameter updates |
| Data Retention | 10 years at +85°C; ensures long-term reliability in unattended industrial deployments |
| Supply Voltage | 5 V ±10%; compatible with standard TTL/CMOS logic rails and legacy 5 V microcontroller systems |
| Operating Temperature | –40°C to +85°C (industrial grade); qualified for use in motor drives, PLCs, and outdoor metering hardware |
Pinout & Package
AT28C64E-20SI is packaged in a 28-lead SOIC (28S) with 0.300" body width, JEDEC MS-012 compliant, lead-free and RoHS-compliant per Atmel documentation.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; compatible with Z80, 8051, and 68K family address lines |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; electrically identical to static RAM data pins for drop-in replacement in existing designs |
| CE | Chip Enable | Active-low chip select; when high, places outputs in high-impedance state to prevent bus contention |
| OE | Output Enable | Active-low output control; allows read operations independent of CE status for flexible bus arbitration |
| WE | Write Enable | Active-low write strobe; initiates self-timed byte write on falling edge; latches address and data internally |
| RDY/BUSY | Open-Drain Status Output | Pulled low during write cycle; supports wired-OR connection across multiple devices for centralized write monitoring |
| VCC | Power Supply | +5 V supply input; includes internal VCC sense circuitry to block writes during brown-out conditions |
| GND | Ground Reference | Signal and power ground reference; decoupling capacitor placement critical for stable 200 ns read timing |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed byte write | Eliminates need for external write timing logic; frees CPU bus after address/data latch, enabling concurrent processing |
| READY/BUSY + DATA polling | Dual asynchronous write completion detection methods ensure robust integration in interrupt-driven or polling-based firmware |
| 12 V CHIP CLEAR | Single 10 ms pulse on WE with OE = 12 V clears entire memory array - simplifies factory reset or recovery procedures |
| 32-byte ID memory | User-accessible EEPROM space at 1FE0H–1FFFH for serialization, calibration data, or firmware version tracking |
| VCC sense & power-on delay | Hardware-enforced write inhibition below 3.8 V and 5 ms post-power-up lockout prevent accidental corruption during power ramp |
Applications
| Industrial PLC Configuration Storage | Legacy Microcontroller Boot Memory |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory automation. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed during power-up and runtime parameter updates via RS-485 host. Use Value: 10⁵ endurance supports daily parameter adjustments over 10+ years; 200 µs write enables responsive HMI-driven configuration changes. |
Use Scenario: Holding boot loader code and hardware initialization vectors for 8051- or Z80-based embedded systems with no external flash controller. IC Role / Device Role / Timing Role: Parallel boot ROM replacement with SRAM-like read timing and in-system programmability. Use Value: 200 ns read access avoids wait states; JEDEC pinout allows PCB reuse from prior SRAM designs. |
| Smart Meter Firmware Backup | Medical Device Calibration Storage |
Use Scenario: Retaining firmware patches and tariff tables in electricity/water meters subject to remote OTA updates and regulatory audits. IC Role / Device Role / Timing Role: Field-upgradable nonvolatile memory interfaced to an 8-bit MCU via parallel bus under strict EMI-limited environments. Use Value: 10-year data retention at +85°C meets IEC 62056 requirements; write protection prevents corruption during power glitches. |
Use Scenario: Storing sensor calibration coefficients, usage logs, and safety-critical settings in portable diagnostic equipment with battery-backed operation. IC Role / Device Role / Timing Role: Tamper-resistant configuration memory with hardware write inhibit and voltage-monitored programming. Use Value: VCC-sense and 12 V CHIP CLEAR support secure recalibration workflows; industrial temp rating ensures stability in clinical environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-20SI | Same pinout, 200 ns access, but 10⁴ endurance (10K cycles) and 1 ms write time; lacks 32-byte ID memory | Suitable only for infrequently updated configuration storage; not recommended for field-upgradable firmware | Select AT28C64B-20SI only if cost sensitivity outweighs endurance and fast-write requirements. |
| ST M28W640ECB90N1Z | 64 Mbit (8M × 8), 90 ns access, 3.3 V core (5 V I/O tolerant); requires level-shifting in pure 5 V systems | Higher density and speed, but incompatible voltage domain and package (56-pin TSOP); not pin-compatible | Choose ST M28W640ECB90N1Z only when migrating to higher-density, lower-power designs with board redesign. |
Compared with AT28C64E-20SI, AT28C64B-20SI trades endurance and write speed for lower cost, while ST M28W640ECB90N1Z offers greater density and speed at the expense of 5 V compatibility and PCB layout changes - making AT28C64E-20SI the optimal choice for drop-in 5 V industrial upgrades requiring proven 100K-cycle reliability.
Availability
AT28C64E-20SI is available at Aetrix Electronics and suitable for industrial PLCs, legacy microcontroller boot systems, smart meter firmware backup, and medical device calibration storage requiring stable component supply across extended product lifecycles.
Supply support for AT28C64E-20SI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for industrial, automotive, and consumer applications.
The AT28C64E-20SI belongs to Atmel's parallel EEPROM product line, designed specifically for 5 V embedded systems requiring SRAM-compatible read/write interfaces, high endurance, and industrial-grade reliability without external timing components.
FAQ
What is the maximum byte write time for AT28C64E-20SI?
The AT28C64E-20SI has a maximum byte write time of 200 µs, as specified in the "FAST BYTE WRITE" section of its datasheet. This is a key differentiator from the standard AT28C64 variant (1 ms write time) and enables full 64 Kbit reprogramming in under 1.6 seconds. The 200 µs value is guaranteed across the industrial temperature range (–40°C to +85°C) and is enabled by internal timing circuitry that eliminates external write pulse generation.
Does AT28C64E-20SI support both READY/BUSY and DATA polling?
Yes, AT28C64E-20SI supports both READY/BUSY and DATA polling for write cycle completion detection. Pin 1 (RDY/BUSY) is an open-drain output pulled low during writes and released upon completion, allowing wired-OR connection. DATA polling uses I/O7, which returns the complement of written data until completion, then true data. Both methods are fully functional in the AT28C64E-20SI and documented in the Device Operation section.
What is the endurance rating of AT28C64E-20SI?
The AT28C64E-20SI is rated for 100,000 (10⁵) write/erase cycles, as confirmed in the Features section and Ordering Information table. This high endurance is achieved through Atmel's enhanced nonvolatile technology and error correction circuitry, distinguishing it from the base AT28C64 (10⁴ cycles) and making it suitable for applications requiring frequent field updates, such as firmware patching or dynamic configuration storage.
Can AT28C64E-20SI be used as a direct replacement for SRAM in existing designs?
AT28C64E-20SI can serve as a functional read-cycle replacement for 8K × 8 SRAM due to its JEDEC-standard byte-wide pinout, 200 ns read access, and identical I/O electrical characteristics (CMOS/TTL compatible). However, write operations require explicit WE control and status monitoring (RDY/BUSY or DATA polling), unlike SRAM's transparent write behavior - so firmware must be modified to handle nonvolatile write sequencing.
What package type is used for AT28C64E-20SI?
AT28C64E-20SI is supplied in a 28-lead SOIC (Small Outline Integrated Circuit) package, designated as "28S" in Atmel's ordering information. It has a 0.300" body width, conforms to JEDEC MS-012, and is RoHS-compliant. This surface-mount package supports automated assembly and provides thermal and mechanical reliability for industrial PCBs operating across –40°C to +85°C.
AT28C64E-20SI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 200µs
- Access Time:
- 200 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28C64E-20SI FAQ
1.How can I place an order for AT28C64E-20SI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64E-20SI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64E-20SI reliable?
The price and inventory of AT28C64E-20SI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64E-20SI is usually 5 days.
3.What payment methods are accepted for AT28C64E-20SI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64E-20SI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64E-20SI?
AT28C64E-20SI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64E-20SI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64E-20SI?
For technical support, including AT28C64E-20SI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64E-20SI requirements.
6.How does Aetrix verify that AT28C64E-20SI is sourced from the original manufacturer or authorized distributors?
All AT28C64E-20SI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64E-20SI meets industry standards.
7.What is the process for return or replacement of AT28C64E-20SI?
All AT28C64E-20SI units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64E-20SI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64E-20SI part is unused and in its original packaging.
Return procedure for AT28C64E-20SI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28C64E-20SI Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

