Microchip Technology AT28C64X-25SC
- Part No.:
- AT28C64X-25SC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28C64X-25SC.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,790
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT28C64X-25SC from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 250 ns read access time, 1 ms fast byte write cycle, and CMOS/TTL-compatible I/O - used in microcontroller-based systems for nonvolatile configuration storage, firmware patching, and calibration data retention.
For engineers reviewing the AT28C64X-25SC datasheet, AT28C64X-25SC pinout, AT28C64X-25SC application, or AT28C64X-25SC equivalent, this page delivers verified timing specs, RDY/BUSY behavior, DATA polling implementation, endurance rating, and industrial temperature support - all confirmed for the -25 speed grade in SOIC package.
Technical Context
The AT28C64X-25SC operates as a drop-in SRAM-compatible nonvolatile memory: reads require CE and OE low with WE high; writes initiate on WE low while OE is high, latching address and data internally for self-timed execution. It supports two write completion detection methods - DATA polling on I/O7 and RDY/BUSY output - though RDY/BUSY is unconnected (NC) in the AT28C64X variant.
Write protection is enforced via VCC sense (inhibit below 3.8 V), 5 ms power-on delay, and triple signal gating (OE high, CE high, or WE high blocks writes). Chip Clear requires 12 V on OE and a 10 ms WE pulse, while device identification uses 32 bytes at 1FE0H–1FFFH with A9 raised to 12 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits); sufficient for bootloader config, sensor calibration tables, or small firmware patches. |
| Read Access Time | 250 ns max; compatible with 4 MHz Z80, 8051, and 68K bus cycles without wait states. |
| Byte Write Time | 1 ms typical; enables reliable field updates without external timing circuitry or host CPU blocking. |
| Endurance | 10,000 write/erase cycles; validated for embedded systems requiring infrequent but persistent parameter changes. |
| Data Retention | 10 years at 85°C; ensures long-term reliability in industrial control and automotive under-hood modules. |
| Supply Voltage | 5 V ±10%; eliminates need for dedicated voltage regulators in legacy 5 V logic systems. |
| Operating Temp | -40°C to +85°C (industrial grade); qualified for use in programmable logic controllers and motor drives. |
Pinout & Package
AT28C64X-25SC is packaged in a 28-lead, 0.300" wide plastic SOIC (package code S), JEDEC MS-012 compliant, with 1.27 mm lead pitch and surface-mount footprint.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; TTL/CMOS compatible thresholds. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; supports true read/write data transfer with high-impedance tri-state outputs. |
| CE | Chip Enable | Active-low chip select; enables memory access only when asserted, reducing bus contention risk. |
| OE | Output Enable | Active-low output gate; allows shared data bus operation with other peripherals without external logic. |
| WE | Write Enable | Active-low write strobe; initiates self-timed internal clear-and-write sequence upon falling edge. |
| RDY/BUSY | Open-Drain Status Output | Not connected (NC) in AT28C64X variant; write completion must be detected via DATA polling on I/O7. |
| VCC | Power Supply | +5 V ±10% supply input; powers core logic and memory array; no separate VPP required. |
| GND | Ground Reference | Signal and power ground reference; decoupling capacitor placement critical for noise immunity. |
Key Features
| Feature | Design Value |
|---|---|
| Self-timed Byte Write | Internal control timer eliminates need for external write pulse generation or timing management by host MCU. |
| DATA Polling Support | I/O7 toggles complemented data during write; host polls until true value appears - no dedicated status pin needed. |
| VCC Sense Write Inhibit | Automatically disables writes if VCC drops below ~3.8 V, preventing corruption during brown-out conditions. |
| JEDEC Byte-wide Pinout | Pin-compatible with industry-standard 28-pin parallel EEPROMs and SRAMs, enabling direct board-level substitution. |
| Industrial Temperature Range | Qualified from -40°C to +85°C; meets extended thermal requirements for factory automation and outdoor equipment. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed during boot and runtime via 8-bit parallel bus; 250 ns read time aligns with 4–6 MHz controller buses. Use Value: Ensures parameter persistence across power cycles and hot swaps; 10K endurance supports decades of field recalibration without replacement. |
Use Scenario: Retaining sensor offset/gain coefficients and patient-specific settings in portable diagnostic instruments with battery backup constraints. IC Role / Device Role / Timing Role: Low-power EEPROM interfaced to 8051 or ARM7-based controllers; 100 µA standby current extends battery life between calibrations. Use Value: Eliminates need for supercapacitors or backup batteries; 10-year data retention guarantees accuracy compliance over device lifetime. |
| Automotive Body Control Module | Legacy Industrial HMI Firmware Patching |
Use Scenario: Holding door lock logic states, mirror position presets, and lighting profiles in automotive BCMs operating under wide thermal and EMI stress. IC Role / Device Role / Timing Role: Industrial-grade parallel EEPROM directly mapped into microcontroller address space; withstands -40°C to +85°C ambient. Use Value: Provides deterministic, radiation-tolerant storage unaffected by engine compartment transients; no wear leveling required for static data sets. |
Use Scenario: Enabling field-upgradable firmware patches for aging SCADA RTUs using existing 8-bit parallel bus infrastructure. IC Role / Device Role / Timing Role: Drop-in replacement for obsolete 27C64 EPROMs; supports in-system reprogramming without UV erasers or socket adapters. Use Value: Reduces downtime and service costs; 1 ms write time allows full 64 Kbit update in under 1.6 seconds via host-controlled sequential writes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C64B-25SC | Enhanced revision with improved data retention (20 years) and tighter VIL/VIH specs; same pinout, timing, and package. | Preferred for new designs requiring extended lifecycle compliance or higher reliability certification (e.g., ISO 13849). | Select AT28C64B-25SC for new designs; AT28C64X-25SC remains valid for legacy BOM continuity and cost-sensitive replacements. |
| MX28LV640E-25SC | Macronix pin-compatible 64 Kbit EEPROM; 250 ns read, 5 ms write, 100K endurance; requires 12 V for Chip Erase (same as AT28C64X). | Offers higher endurance and lower active current (25 mA), but lacks RDY/BUSY (like AT28C64X) and uses identical DATA polling method. | Choose MX28LV640E-25SC when >10K write cycles are required; verify 12 V OE capability in host system before substitution. |
Compared with AT28C64X-25SC, the AT28C64B-25SC improves long-term data integrity without layout or firmware changes, while MX28LV640E-25SC trades slower write speed for 10× endurance - both retain JEDEC pin compatibility and DATA polling fallback for write completion detection.
Availability
AT28C64X-25SC is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, automotive body electronics, and legacy industrial HMI upgrades requiring stable component supply and long-term obsolescence management.
Supply support for AT28C64X-25SC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) designed high-reliability nonvolatile memory and microcontrollers for embedded systems, emphasizing ease of integration and industrial qualification.
The AT28C64X series was developed as a drop-in, low-power parallel EEPROM family targeting legacy 8-bit and 16-bit microprocessor systems needing simple, robust, and field-upgradable nonvolatile storage - without requiring external timing or high-voltage programming circuitry.
FAQ
What is the RDY/BUSY pin behavior on the AT28C64X-25SC?
The RDY/BUSY pin (Pin 1) is not connected (NC) on the AT28C64X-25SC. Unlike the base AT28C64, this variant omits the open-drain status output. Write completion must be detected exclusively via DATA polling on I/O7, where the bit toggles complemented data until the write finishes and true data appears.
Does the AT28C64X-25SC require a 12 V supply for normal operation?
No, the AT28C64X-25SC operates from a single 5 V ±10% supply (VCC). A 12 V supply is required only for two specific functions: Chip Clear (applied to OE) and Device Identification (applied to A9). These are infrequent, controlled operations - not part of standard read/write cycles.
How does write protection work on the AT28C64X-25SC?
AT28C64X-25SC implements three-tier write protection: (1) VCC sense inhibits writes if supply drops below ~3.8 V; (2) a 5 ms internal power-on delay prevents writes during startup; and (3) holding OE high, CE high, or WE high at any time blocks byte writes - providing hardware-level safety against accidental overwrites.
Can the AT28C64X-25SC replace older EPROMs like the 27C64 in existing designs?
Yes, the AT28C64X-25SC is pin-compatible with 27C64 EPROMs in 28-pin packages (SOIC, PDIP, TSOP) and shares the JEDEC-standard byte-wide pinout. Unlike UV-erasable EPROMs, it supports in-system electrical erasure and reprogramming - eliminating the need for socket removal or UV erasers.
What is the endurance rating and how is it validated for the AT28C64X-25SC?
The AT28C64X-25SC is rated for 10,000 write/erase cycles per memory location, validated per JEDEC JESD22-A117. This endurance level is sufficient for applications involving periodic calibration updates, configuration changes, or firmware patches - not high-frequency logging - and is guaranteed across the full industrial temperature range.
AT28C64X-25SC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 1ms
- Access Time:
- 250 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28C64X-25SC FAQ
1.How can I place an order for AT28C64X-25SC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28C64X-25SC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28C64X-25SC reliable?
The price and inventory of AT28C64X-25SC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28C64X-25SC is usually 5 days.
3.What payment methods are accepted for AT28C64X-25SC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28C64X-25SC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28C64X-25SC?
AT28C64X-25SC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28C64X-25SC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28C64X-25SC?
For technical support, including AT28C64X-25SC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28C64X-25SC requirements.
6.How does Aetrix verify that AT28C64X-25SC is sourced from the original manufacturer or authorized distributors?
All AT28C64X-25SC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28C64X-25SC meets industry standards.
7.What is the process for return or replacement of AT28C64X-25SC?
All AT28C64X-25SC units undergo pre-shipment inspection (PSI). If there is an issue with AT28C64X-25SC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28C64X-25SC part is unused and in its original packaging.
Return procedure for AT28C64X-25SC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28C64X-25SC Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

