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Microchip Technology AT28HC256-12TU
- Part No.:
- AT28HC256-12TU
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-TSSOP (0.465", 11.80mm Width)
- Datasheet:
-
AT28HC256-12TU.pdf
- Description:
- IC EEPROM 256KBIT PAR 28TSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,991
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Product details
Overview
AT28HC256-12TU from Microchip Technology is a military-grade 256-Kbit (32,768 × 8) paged parallel EEPROM with 120 ns read access time, 10 ms maximum page write cycle time, and full operation across –55°C to +125°C. It features hardware/software data protection, DATA polling and toggle-bit write completion detection, and operates from a single 5V ±10% supply. It serves as nonvolatile program/data storage in avionics control modules requiring high reliability and radiation-tolerant memory.
For engineers reviewing the AT28HC256-12TU datasheet, AT28HC256-12TU pinout, AT28HC256-12TU application, or AT28HC256-12TU equivalent, this page delivers verified electrical specs, JEDEC-compliant byte-wide pin mapping, military temperature validation, page-write timing constraints, and real-world substitution guidance for legacy MIL-STD-883 embedded systems.
Technical Context
The AT28HC256-12TU implements a paged architecture with an internal 64-byte latch enabling simultaneous writes of 1–64 bytes per cycle. Its address decoding uses A0–A14 (15-bit), where A6–A14 define the 64-byte page boundary and A0–A5 select individual bytes within that page - enforcing strict tBLC ≤ 150 µs inter-byte timing during page load.
Write completion is confirmed via dual asynchronous methods: DATA polling on I/O7 (complement-to-data during write, true data upon completion) and toggle-bit behavior on I/O6 (toggling until write ends). Hardware protection includes VCC sense (<3.8 V inhibits write), 5 ms power-on delay, and noise filtering (<15 ns pulses ignored on WE/CE).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 256 Kbit (32,768 × 8) - supports full 16-bit address space with byte-level random access and page-aligned burst writes. |
| Read Access Time | 120 ns max - meets MIL-STD-883 Class B timing for real-time firmware fetch in flight-critical controllers. |
| Page Write Cycle Time | 10 ms max - defines worst-case latency for updating configuration blocks without system stall. |
| Endurance | 10,000 write/erase cycles - validated under military temperature extremes; sufficient for field-updatable mission profiles. |
| Data Retention | 10 years at +125°C - guaranteed retention under continuous high-temp operation in sealed avionics enclosures. |
| Supply Voltage | 5V ±10% - compatible with legacy TTL/CMOS logic rails; no external regulation required. |
| Operating Temperature | –55°C to +125°C - fully qualified per MIL-PRF-38535 for extended-range military platforms. |
Pinout & Package
AT28HC256-12TU is supplied in a 32-lead CERDIP (Ceramic Dual In-line Package) with 0.600" width, hermetically sealed per MIL-STD-1835 D-10 Config A. Pin 1 is index-marked; pins 1 and 17 are "Don't Connect" (DC) and must remain unconnected per datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address Inputs | 15-bit address bus; A6–A14 define 64-byte page boundaries for page write operations. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; I/O7 used for DATA polling, I/O6 for toggle-bit status indication. |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read; initiates write when pulsed low with OE high. |
| OE | Output Enable | Active-low output control; enables data output during read; must be high during write cycles. |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; controls byte vs. page write initiation. |
| VCC | Power Supply | +5V ±10% main supply; powers core logic and I/O buffers; internally monitored for write inhibition below 3.8 V. |
| GND | Ground Reference | Signal and power return; decoupling capacitor required near VCC pin per MIL-STD-883 layout rules. |
Key Features
| Feature | Design Value |
|---|---|
| 64-byte internal page register | Enables burst loading of up to 64 bytes without bus contention; frees address/data bus for concurrent tasks during write setup. |
| DATA Polling (I/O7) | Allows host CPU to poll write status without timers or interrupts; reduces firmware overhead in resource-constrained microcontrollers. |
| Toggle Bit (I/O6) | Provides hardware-agnostic write-complete signal usable by FPGAs, ASICs, or discrete logic without software dependency. |
| Software Data Protection (SDP) | Three-byte unlock sequence (AAh/55h/A0h) prevents accidental writes during power transitions - critical for in-field reprogramming safety. |
| MIL-STD-883 Class B qualification | Validated for shock, vibration, thermal cycling, and hermeticity - required for deployment in airborne and missile guidance systems. |
Applications
| Avionics Flight Control Unit | Tactical Radio Firmware Storage |
|---|---|
|
Use Scenario: Storing calibrated sensor coefficients and real-time control algorithms in a fly-by-wire flight computer operating at –40°C to +85°C ambient with transient thermal gradients. IC Role / Device Role / Timing Role: Nonvolatile configuration memory providing deterministic 120 ns read access for servo loop execution at 1 kHz update rate. Use Value: Eliminates need for external voltage supervisors or write-protection logic; SDP and VCC-sense ensure zero inadvertent writes during aircraft power sequencing. |
Use Scenario: Holding encrypted communication keys and frequency-hopping tables in a manpack radio subjected to rapid temperature shifts and EMI-rich battlefield environments. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage with page-write capability enabling over-the-air key updates without full device erase. Use Value: 10,000-cycle endurance and 10-year data retention guarantee cryptographic integrity across multi-year deployments without maintenance. |
| Missile Guidance System Memory | Spacecraft Onboard Telemetry Logger |
|
Use Scenario: Recording pre-launch alignment parameters and inertial measurement unit (IMU) bias offsets in a solid-fuel missile's guidance section exposed to launch vibration and vacuum. IC Role / Device Role / Timing Role: Radiation-tolerant, hermetically sealed nonvolatile memory supporting MIL-PRF-38535 Class K screening requirements. Use Value: CERDIP package provides proven resistance to neutron-induced single-event upsets (SEUs); full –55°C to +125°C operation ensures functionality during ascent phase. |
Use Scenario: Capturing housekeeping telemetry (voltage, temperature, attitude) during orbital insertion, where power interruptions and thermal cycling occur every 90 minutes. IC Role / Device Role / Timing Role: Low-power standby mode (≤300 µA CMOS) extends battery life between downlink windows; page write minimizes energy per data packet. Use Value: 3 mA TTL standby current and 80 mA active current enable efficient duty-cycled logging without thermal derating in confined satellite bays. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar EEPROM memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C256-12JU | Commercial grade (0°C to +70°C), same pinout and AC timing but lacks MIL-STD-883 qualification and extended endurance. | Not suitable for military platforms requiring temperature or reliability certification; acceptable for ground-test benches or lab prototypes. | Select only if environmental qualification is unnecessary and cost is primary constraint; verify VCC-sense behavior matches legacy design. |
| MX28F256KXDI-12 | Intel-compatible 256 Kbit flash EPROM (not EEPROM); requires sector erase before write; no page-write capability; 120 ns read, but write latency >100 ms. | Requires firmware rewrite to support erase-before-write; incompatible with existing AT28HC256 page-write drivers and polling routines. | Only consider for new designs where flash density/cost outweighs compatibility; not a drop-in replacement due to fundamental architecture mismatch. |
Compared with AT28HC256-12TU, AT28C256-12JU sacrifices military temperature range and qualification for lower cost, while MX28F256KXDI-12 replaces EEPROM's byte/page flexibility with flash's erase-block constraints - making both unsuitable as direct replacements in certified avionics without hardware and firmware revalidation.
Availability
AT28HC256-12TU is available at Aetrix Electronics and suitable for avionics control units, tactical radios, missile guidance subsystems, and spacecraft telemetry loggers requiring stable component supply under extended temperature and long-lifecycle programs.
Supply support for AT28HC256-12TU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions, with deep heritage in military and aerospace components through its acquisition of Atmel.
The AT28HC256 product line was designed specifically for high-reliability embedded systems requiring MIL-STD-883-qualified EEPROM with paged write architecture, hardware/software write protection, and full military temperature operation.
FAQ
What is the maximum page write size supported by the AT28HC256-12TU?
The AT28HC256-12TU supports writing 1 to 64 bytes per page write operation. All bytes must reside on the same 64-byte page defined by address bits A6–A14, and each successive byte must be loaded within 150 µs (tBLC) of the previous one. Exceeding tBLC triggers automatic internal programming. This capability is intrinsic to the AT28HC256-12TU's internal 64-byte latch architecture and is validated across its full military temperature range.
Does the AT28HC256-12TU require external high-voltage circuitry for programming?
No, the AT28HC256-12TU operates from a single 5V ±10% supply and requires no external high-voltage programming circuitry. All write operations - including byte, page, and chip erase - are executed using standard 5V logic levels. The optional chip erase mode uses a 6-byte software command sequence applied at 5V; the 12V requirement referenced in the datasheet applies only to the separate device identification area (7FC0H–7FFFH), not to main array programming. The AT28HC256-12TU is fully functional with standard 5V I/O interfaces.
How is write completion detected on the AT28HC256-12TU?
Write completion on the AT28HC256-12TU is detected using two independent hardware methods: DATA polling on I/O7 (which returns complement-of-data during write and true data upon completion) and toggle-bit behavior on I/O6 (which toggles between 0 and 1 until write finishes, then stabilizes). Both methods operate asynchronously and require no timer or interrupt resources. These mechanisms are fully characterized and guaranteed across the –55°C to +125°C range for the AT28HC256-12TU.
Is the AT28HC256-12TU pin-compatible with the commercial AT28C256 series?
Yes, the AT28HC256-12TU uses the JEDEC-approved byte-wide pinout and is physically and electrically pin-compatible with AT28C256 variants (e.g., AT28C256-12JU) in the same 32-lead CERDIP package. Address, data, and control signals (A0–A14, I/O0–I/O7, CE, OE, WE, VCC, GND) occupy identical positions. However, AT28HC256-12TU adds military-grade qualification, extended endurance options, and tighter DC/AC specs - meaning it can replace commercial versions in upgraded systems, but not vice versa for certified applications.
What package type is used for the AT28HC256-12TU?
The AT28HC256-12TU is packaged in a 32-lead CERDIP (Ceramic Dual In-line Package) with 0.600" width, hermetically sealed per MIL-STD-1835 D-10 Config A. This package features glass-sealed ceramic construction, index corner marking, and pins 1 and 17 designated as "Don't Connect" (DC). It is distinct from CLCC, Flatpack, or PGA variants - the "TU" suffix explicitly denotes the CERDIP configuration per Microchip's ordering nomenclature.
AT28HC256-12TU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-TSSOP (0.465", 11.80mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 120 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSOP
AT28HC256-12TU FAQ
1.How can I place an order for AT28HC256-12TU through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC256-12TU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC256-12TU reliable?
The price and inventory of AT28HC256-12TU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC256-12TU is usually 5 days.
3.What payment methods are accepted for AT28HC256-12TU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC256-12TU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC256-12TU?
AT28HC256-12TU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC256-12TU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC256-12TU?
For technical support, including AT28HC256-12TU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC256-12TU requirements.
6.How does Aetrix verify that AT28HC256-12TU is sourced from the original manufacturer or authorized distributors?
All AT28HC256-12TU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC256-12TU meets industry standards.
7.What is the process for return or replacement of AT28HC256-12TU?
All AT28HC256-12TU units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC256-12TU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC256-12TU part is unused and in its original packaging.
Return procedure for AT28HC256-12TU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28HC256-12TU Tags
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