Microchip Technology AT28HC256-90SU

Overview

AT28HC256-90SU from Microchip Technology is a 256-Kbit (32,768 × 8) parallel EEPROM with 90 ns read access time, single 5V ±10% supply, JEDEC-standard byte-wide pinout, and industrial temperature range (–40°C to +85°C). It supports automatic 1–64-byte page writes with internal latching and data polling for write completion detection, used in embedded system configuration storage and firmware parameter retention.

For engineers reviewing the AT28HC256-90SU datasheet, AT28HC256-90SU pinout, AT28HC256-90SU application, or AT28HC256-90SU equivalent, key selection criteria include its 90 ns read timing, 3 mA standby current, hardware/software write protection, 10,000/100,000 endurance cycles, and compatibility with legacy SRAM-based memory interfaces requiring nonvolatile backup.

Technical Context

The AT28HC256-90SU operates as a drop-in parallel memory replacement for static RAM in legacy systems, using CE/OE/WE three-line control logic to manage read/write states without external timing circuitry. Its internal 64-byte page register enables burst writes while freeing the address/data bus during programming.

Write completion is verified via DATA Polling on I/O7 (complement-to-data during write, true data after completion) or Toggle Bit behavior on I/O6, both usable at any point during the internal 3 ms or 10 ms write cycle. Hardware protection includes VCC sense (<3.8 V inhibits write), 5 ms power-on delay, and noise filtering on WE/CE inputs.

Key Specifications

Pinout & Package

AT28HC256-90SU is supplied in a 28-lead Small Outline Integrated Circuit (SOIC) package with 300 mil body width, RoHS-compliant green molding compound, and JEDEC-standard footprint. Pin 1 is marked by a beveled corner; pins are numbered counterclockwise from top-left when viewed from top side.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar parallel EEPROM applications.

Compared with AT28HC256-90PU and ST M28W256FCT-90N6, the AT28HC256-90SU offers superior design flexibility through RoHS-compliant SOIC packaging, dual endurance grades (10k/100k), and integrated software/hardware write protection-reducing external component count and qualification effort in new industrial designs.

Availability

AT28HC256-90SU is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics equipment, telecom line cards, and automotive body control modules requiring stable component supply across multi-year production cycles.

Supply support for AT28HC256-90SU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.

The AT28HC256 belongs to Microchip's industrial-grade parallel EEPROM product line, engineered for reliable nonvolatile data storage in harsh environments where battery-free operation, long-term data retention, and immunity to power glitches are critical.

FAQ

What is the maximum write cycle time for AT28HC256-90SU during page write operations?

The AT28HC256-90SU supports two page write cycle times: 3 ms for the F-grade variant and 10 ms for standard versions including AT28HC256-90SU. This 10 ms maximum applies to all 1–64-byte page writes, with internal timing controlled by an on-chip oscillator-no external clock required. The device automatically completes programming once initiated, enabling host firmware to poll I/O7 or monitor I/O6 for completion.

Does AT28HC256-90SU require a 12 V supply for normal operation or only for special functions?

The AT28HC256-90SU operates exclusively from a 5 V ±10% supply during standard read/write cycles. A 12 V ±0.5 V pulse on A9 is required only for accessing the optional 64-byte device identification area (7FC0H–7FFFH); this voltage is not used for main memory reads, writes, or chip erase. All other functions-including software data protection enable/disable-execute at 5 V.

How does hardware write protection work in AT28HC256-90SU to prevent accidental writes?

AT28HC256-90SU implements four hardware safeguards: (1) VCC sense circuitry inhibits writes if supply drops below ~3.8 V; (2) a 5 ms internal power-on delay prevents writes until stable 5 V is confirmed; (3) write is blocked unless CE is low, OE is high, and WE is low simultaneously; and (4) input noise filters reject pulses <15 ns on WE or CE. These features operate autonomously without firmware intervention.

Can AT28HC256-90SU be used as a direct replacement for standard SRAM in existing designs?

Yes-AT28HC256-90SU uses JEDEC-approved byte-wide pinout and CMOS/TTL-compatible signaling, allowing drop-in replacement of 32K × 8 SRAMs like the 62256 in many cases. Critical considerations include verifying that the host system asserts CE/OE/WE per AT28HC256-90SU timing (e.g., tOE ≤40 ns), accommodates 90 ns read latency, and handles write completion via polling rather than fixed delays.

What endurance grade is specified for AT28HC256-90SU, and how is it indicated in the part marking?

The AT28HC256-90SU is marked with suffix 'U' indicating SOIC packaging and '90' denoting 90 ns access time; endurance grade is encoded separately: blank = 10,000 cycles, 'E' = 100,000 cycles. Standard AT28HC256-90SU units ship with 10,000-cycle endurance unless ordered with 'E' suffix (e.g., AT28HC256-90SUE). Both grades retain data for 10 years at 85°C.