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Microchip Technology AT28HC256-90SU-T
- Part No.:
- AT28HC256-90SU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28HC256-90SU-T.pdf
- Description:
- IC EEPROM 256KBIT PAR 28SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:4,153
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Product details
Overview
AT28HC256-90SU-T from Microchip Technology is a 256-Kbit (32,768 × 8) parallel EEPROM with 90 ns read access time, single 5V ±10% supply operation, JEDEC-approved byte-wide pinout, and industrial temperature range (–40°C to +85°C). It supports automatic 1–64-byte page writes with internal latching and data polling for write completion detection, deployed in legacy industrial control firmware storage and embedded configuration memory systems.
For engineers reviewing the AT28HC256-90SU-T datasheet, AT28HC256-90SU-T pinout, AT28HC256-90SU-T application, or AT28HC256-90SU-T equivalent, this page delivers verified electrical specs, package mapping, real-world use cases, and validated alternative options - all grounded in Microchip's DS20006428B documentation and official packaging data.
Technical Context
The AT28HC256-90SU-T implements a CMOS-based parallel EEPROM architecture with dual-line chip enable (CE) and output enable (OE) control, enabling bus contention avoidance in SRAM-compatible interfaces. Its internal 64-byte page register latches address and data during write cycles, decoupling the host bus while internal timing logic executes programming.
Write completion is confirmed via DATA Polling on I/O7 (complement-to-data toggle) or Toggle Bit behavior on I/O6, both usable at any point during tWC. Hardware protection includes VCC sense (<3.8V inhibit), 5 ms power-on delay, and noise filtering on WE/CE inputs - no external circuitry required for robust operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 256 Kbit (32,768 × 8) - provides sufficient nonvolatile storage for boot code, calibration tables, and device configuration in space-constrained industrial controllers. |
| Read Access Time | 90 ns max - enables direct replacement of SRAM in legacy 8-bit microcontroller systems without timing redesign. |
| Page Write Cycle | ≤10 ms - allows efficient bulk updates of configuration blocks (e.g., 64-byte sensor calibration sets) with minimal host CPU overhead. |
| Supply Voltage | 5V ±10% - compatible with standard TTL/CMOS logic rails; eliminates need for dedicated voltage regulators in 5V systems. |
| Operating Temperature | –40°C to +85°C - certified for deployment in industrial automation, motor drives, and outdoor metering equipment. |
| Endurance & Retention | 10,000 write cycles / 10-year data retention - meets long-life requirements for infrequently updated system parameters. |
| Standby Current | 3 mA max (TTL mode) - reduces quiescent power in always-on monitoring nodes where low sleep current is critical. |
Pinout & Package
AT28HC256-90SU-T is supplied in a 28-lead Small Outline Integrated Circuit (SOIC) package with JEDEC-standard 300-mil body width and gull-wing leads. Pin 1 is marked by a beveled corner; pins are numbered counterclockwise from top-left when viewed from top side.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address Inputs | 15-bit address bus (A0 LSB to A14 MSB); defines 32,768-word addressing space; A6–A14 define page boundaries for 64-byte writes. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel data path; I/O7 used for DATA Polling; I/O6 used for Toggle Bit status indication during write cycles. |
| CE | Chip Enable | Active-low global enable; must be low for read/write access; high-Z output when high, preventing bus contention. |
| OE | Output Enable | Active-low output gate; controls data assertion on I/O lines independently of CE; enables shared-bus arbitration. |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; initiates byte or page programming sequence. |
| VCC | Power Supply | +5V ±10% main supply; powers core logic and memory array; internally monitored for write inhibition below 3.8V. |
| GND | Ground Reference | Signal and power return; requires low-impedance connection to minimize noise coupling into sensitive read paths. |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-Wide Pinout | Direct drop-in compatibility with legacy SRAM and EPROM sockets in industrial PCBs designed for 28-pin parallel memory devices. |
| Automatic Page Write | Reduces host firmware overhead: up to 64 bytes written per command with internal address/data latching and self-timed execution. |
| DATA Polling & Toggle Bit | Two independent, hardware-verified methods to detect write completion without fixed delays - improves system responsiveness and reliability. |
| Hardware Data Protection | VCC sensing, 5 ms power-on delay, and 15 ns noise filtering eliminate external reset supervisors and debounce circuits in 5V systems. |
| Software Data Protection (SDP) | User-configurable write lock via 3-byte command sequence (AAh/55h/A0h); prevents accidental overwrites during power transitions or debug sessions. |
Applications
| Industrial PLC Firmware Storage | Medical Device Calibration Memory |
|---|---|
|
Use Scenario: Storing firmware update images and bootloader code in programmable logic controllers operating in factory-floor environments with wide temperature swings and EMI exposure. IC Role / Device Role / Timing Role: Nonvolatile program memory accessed as SRAM-mapped peripheral; 90 ns read timing aligns with 8/16-bit microcontroller bus cycles. Use Value: Eliminates need for external wait-state generators; 10,000-cycle endurance supports field firmware upgrades over 10+ years of service life. |
Use Scenario: Retaining calibrated sensor offsets and gain coefficients in portable diagnostic equipment requiring FDA-compliant data integrity and traceability. IC Role / Device Role / Timing Role: Configuration memory mapped to microcontroller address space; SDP-enabled writes prevent corruption during battery-swapping or brownout events. Use Value: On-chip 64-byte ID area stores serial numbers and calibration timestamps; RoHS-compliant green packaging meets medical regulatory requirements. |
| Automotive Body Control Module (BCM) | Legacy Test Equipment Configuration |
|
Use Scenario: Holding user-defined lighting profiles, door lock settings, and mirror position presets in automotive BCMs where EEPROM must survive 125°C under-hood transients. IC Role / Device Role / Timing Role: Parameter storage IC interfaced via parallel bus; operates across full industrial temperature range (–40°C to +85°C) with no derating. Use Value: Hardware write protection ensures settings persist through ignition cycling; 10-year data retention guarantees lifetime calibration validity without backup capacitors. |
Use Scenario: Preserving instrument-specific setup parameters (e.g., voltage ranges, trigger thresholds) in benchtop oscilloscopes and signal generators with decades-long product lifecycles. IC Role / Device Role / Timing Role: Static RAM-replacement memory for configuration registers; JEDEC pinout allows reuse of existing PCB footprints from obsolete NMOS EPROMs. Use Value: 32,768 × 8 organization matches legacy test firmware architectures; 5V-only interface avoids level-shifting complexity in aging designs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C256-90PU | Same 256-Kbit organization and 90 ns speed, but in 28-pin PDIP package; lacks green (RoHS) marking; endurance rated at 10k cycles only. | Suitable for prototyping or through-hole legacy boards; not qualified for surface-mount production or RoHS-compliant end products. | Select when DIP socket compatibility is required and RoHS compliance is not mandated. |
| BR24G256FJ-3GE2 | I²C serial interface (not parallel); 256 Kbit capacity; 1 MHz clock; 1.7–5.5V supply; 1 million write cycles; 40 µA standby current. | Requires firmware rewrite for serial protocol handling; better suited for new designs with limited GPIO or space constraints. | Choose for ultra-low-power or space-constrained applications where bus simplicity outweighs parallel speed requirements. |
Compared with AT28HC256-90SU-T, AT28C256-90PU offers identical functionality in through-hole form but lacks RoHS compliance and modern packaging; BR24G256FJ-3GE2 trades parallel speed and pin compatibility for serial interface flexibility, lower power, and higher endurance - making it viable only in newly architected systems.
Availability
AT28HC256-90SU-T is available at Aetrix Electronics and suitable for industrial PLC firmware storage, medical device calibration memory, and automotive body control module configuration requiring stable component supply across extended product lifecycles.
Supply support for AT28HC256-90SU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog components, and memory solutions, serving industrial, automotive, and consumer markets with vertically integrated silicon and software platforms.
The AT28HC256 product line delivers high-reliability parallel EEPROMs optimized for legacy system upgrades and long-lifecycle embedded applications where SRAM-like interface simplicity and proven nonvolatile storage are essential.
FAQ
What is the maximum page write size supported by the AT28HC256-90SU-T?
The AT28HC256-90SU-T supports up to 64 bytes per page write operation. This is enabled by its internal 64-byte page register, which latches address and data during the write cycle. All bytes in a given page write must reside within the same 64-byte boundary defined by address bits A6–A14; crossing page boundaries requires separate write commands. The AT28HC256-90SU-T datasheet confirms this limit in Section 6.8 and Table 6-4.
Does the AT28HC256-90SU-T require external high-voltage programming signals?
No, the AT28HC256-90SU-T operates with a single 5V ±10% supply and does not require external high-voltage programming signals for standard byte or page writes. Only optional features - such as Chip Erase (12V on A9) or Device Identification memory writes - demand elevated voltage. All normal read/write operations function fully at 5V, as specified in Section 4.2 and Table 6-1 of the AT28HC256-90SU-T datasheet.
How is write completion detected on the AT28HC256-90SU-T?
Write completion on the AT28HC256-90SU-T is detected using either DATA Polling on I/O7 (where the bit toggles to complement of written data until completion) or the Toggle Bit mechanism on I/O6 (which alternates state during programming and stabilizes upon finish). Both methods are hardware-verified and usable at any time during the write cycle, eliminating fixed delay loops. These mechanisms are detailed in Sections 6.14 and 6.16 of the AT28HC256-90SU-T datasheet.
Is the AT28HC256-90SU-T pin-compatible with older NMOS EPROMs like the 27C256?
No, the AT28HC256-90SU-T is not pin-compatible with NMOS EPROMs such as the 27C256. While both are 28-pin parallel memories, the AT28HC256-90SU-T uses a JEDEC-approved byte-wide pinout with dedicated WE and OE controls, whereas the 27C256 relies on OE and PGMS/CE functions and lacks a true write-enable input. Direct substitution would require PCB layout changes and firmware adaptation. The AT28HC256-90SU-T datasheet explicitly references JEDEC compliance in Section 1.
What is the endurance rating of the AT28HC256-90SU-T, and how is it verified?
The AT28HC256-90SU-T is rated for 10,000 write/erase cycles minimum, with data retention guaranteed for 10 years at +85°C. This endurance figure is derived from Microchip's accelerated life testing per JESD22-A117 and is documented in Section 1 (Features) and Section 4.3 (DC Characteristics) of the AT28HC256-90SU-T datasheet. The "E" suffix variant (e.g., AT28HC256E) offers 100,000 cycles, but the -90SU-T part carries the standard 10k rating.
AT28HC256-90SU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28HC256-90SU-T FAQ
1.How can I place an order for AT28HC256-90SU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC256-90SU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC256-90SU-T reliable?
The price and inventory of AT28HC256-90SU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC256-90SU-T is usually 5 days.
3.What payment methods are accepted for AT28HC256-90SU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC256-90SU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC256-90SU-T?
AT28HC256-90SU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC256-90SU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC256-90SU-T?
For technical support, including AT28HC256-90SU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC256-90SU-T requirements.
6.How does Aetrix verify that AT28HC256-90SU-T is sourced from the original manufacturer or authorized distributors?
All AT28HC256-90SU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC256-90SU-T meets industry standards.
7.What is the process for return or replacement of AT28HC256-90SU-T?
All AT28HC256-90SU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC256-90SU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC256-90SU-T part is unused and in its original packaging.
Return procedure for AT28HC256-90SU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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