Microchip Technology AT28HC256-90TU-T
- Part No.:
- AT28HC256-90TU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-TSSOP (0.465", 11.80mm Width)
- Datasheet:
-
AT28HC256-90TU-T.pdf
- Description:
- IC EEPROM 256KBIT PAR 28TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:3,305
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Product details
Overview
AT28HC256-90TU-T from Microchip Technology is a military-grade 256-Kbit (32,768 × 8) paged parallel EEPROM with 90 ns read access time, 10 ms maximum page write cycle time, and full operation across –55°C to +125°C. It features hardware/software data protection, DATA polling for write completion detection, and CMOS/TTL-compatible I/O for embedded avionics and ruggedized control systems.
For engineers reviewing the AT28HC256-90TU-T datasheet, AT28HC256-90TU-T pinout, AT28HC256-90TU-T application, or AT28HC256-90TU-T equivalent, this page delivers verified electrical specs, JEDEC-compliant byte-wide pin mapping, military temperature validation, page-write timing constraints, and real-world design implications for high-reliability nonvolatile storage.
Technical Context
The AT28HC256-90TU-T implements a paged architecture with an internal 64-byte latch enabling simultaneous writes of 1–64 bytes per cycle. Its address decoding supports A0–A14 (32K words), and write operations are governed by internal control timers-no external timing circuitry required.
Hardware protection includes VCC sense (<3.8 V inhibit), 5 ms power-on delay, noise filtering on WE/CE (<15 ns rejection), and dual-line chip/output enable logic. Software data protection uses a 3-byte unlock sequence (AAh/55h/A0h) to enable/disable write lock globally.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory capacity | 256 Kbit (32,768 × 8); supports direct byte-addressable access without address multiplexing |
| Read access time | 90 ns max; enables compatibility with 10 MHz bus systems without wait states |
| Page write cycle time | 10 ms max; defines worst-case latency before next memory access can begin |
| Endurance | 10,000 write/erase cycles; validated under military temperature range and voltage stress |
| Data retention | 10 years at +125°C; guaranteed for long-life deployed systems without refresh |
| Supply voltage | 5 V ±10%; operates across full military VCC range without regulation or bypassing overhead |
| Operating temperature | –55°C to +125°C; qualified per MIL-STD-883, suitable for space, defense, and downhole applications |
Pinout & Package
AT28HC256-90TU-T is supplied in a 32-lead CLCC (Ceramic Leadless Chip Carrier) package with JEDEC-standard byte-wide pinout. Pins 1 and 17 are "Don't Connect" (DC); all other pins conform to industry-standard parallel EEPROM interface layout.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address inputs | 15-bit address bus supporting full 32K-word addressing; A6–A14 define page boundaries for 64-byte writes |
| I/O0–I/O7 | Bidirectional data bus | CMOS/TTL-compatible 8-bit data path; I/O7 used for DATA polling, I/O6 for toggle-bit status reporting |
| CE | Chip Enable | Active-low primary selection signal; must be low with OE low and WE high for read access |
| OE | Output Enable | Active-low output gate; controls tri-state behavior independently of CE to prevent bus contention |
| WE | Write Enable | Active-low write strobe; falling edge latches data; initiates byte or page programming sequence |
| VCC / GND | Power supply | Single 5 V supply with <3 mA standby current; no separate VPP or programming voltage required |
Key Features
| Feature | Design Value |
|---|---|
| 64-byte internal page register | Enables burst writes without CPU address/data bus hold; frees bus for concurrent operations during tWC |
| DATA Polling on I/O7 | Allows real-time write completion detection via software read-no timer or interrupt dependency |
| Toggle Bit on I/O6 | Provides hardware-level write-in-progress flag; eliminates polling overhead in time-critical firmware |
| Software Data Protection (SDP) | 3-byte unlock sequence prevents accidental writes during power transitions or reset glitches |
| VCC sense & power-on delay | Automatically inhibits writes until stable 5 V is confirmed and 5 ms delay expires-no external supervisor needed |
Applications
| Avionics Flight Control Memory | Tactical Radio Configuration Storage |
|---|---|
Use Scenario: Storing calibrated sensor offsets, flight trim tables, and fail-safe configuration parameters in F-16 digital flight control units. IC Role / Device Role / Timing Role: Nonvolatile configuration store accessed during boot and runtime; retains data through thermal cycling and vibration. Use Value: 10-year data retention at +125°C ensures mission-critical settings survive extended depot storage and field deployment without refresh. |
Use Scenario: Holding frequency hopping sequences, encryption keys, and channel maps in AN/PRC-163 manpack radios operating in desert environments. IC Role / Device Role / Timing Role: Secure, tamper-resistant parameter bank with software lockout preventing unintended reprogramming during RF transmission bursts. Use Value: Hardware VCC-sense and SDP eliminate need for external voltage monitors or watchdog ICs-reducing BOM count and board area. |
| Downhole Oilfield Tool Calibration | Military Vehicle Engine Control EEPROM |
Use Scenario: Recording pressure/temperature calibration coefficients and tool serial history in MWD/LWD tools exposed to 175°C wellbore temperatures. IC Role / Device Role / Timing Role: High-temperature nonvolatile memory interfaced directly to TI C2000 MCU via parallel bus; survives repeated thermal shock. Use Value: Full –55°C to +125°C qualification and 10,000-cycle endurance support >500 logging runs without degradation. |
Use Scenario: Storing adaptive fuel injection maps and emission compliance flags in armored vehicle ECUs subjected to engine bay thermal transients. IC Role / Device Role / Timing Role: Mission-critical parameter store with dual detection (DATA Polling + Toggle Bit) ensuring deterministic write completion before CAN message transmission. Use Value: 90 ns read access enables real-time lookup during 100 µs control loop windows-no performance penalty vs. SRAM. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28HC256-12TU-T | 120 ns read access time; identical 10 ms write cycle, endurance, and temperature rating | Suitable where bus timing margin allows slower access; lower cost in non-critical timing paths | Select when system clock ≤8.3 MHz and 90 ns timing headroom is unnecessary |
| MX28F256J3F | JEDEC-compatible 256 Kbit flash; requires 12 V VPP for programming; no built-in page latch or DATA polling | Requires external high-voltage generation and polling firmware; lacks automatic page write | Choose only if legacy flash infrastructure exists and write latency tolerance exceeds 100 ms |
Compared with AT28HC256-12TU-T, the AT28HC256-90TU-T delivers tighter timing for high-speed microcontrollers; compared with MX28F256J3F, it eliminates VPP complexity and guarantees deterministic 10 ms write completion-critical for safety-critical firmware updates.
Availability
AT28HC256-90TU-T is available at Aetrix Electronics and suitable for avionics, tactical communications, and downhole instrumentation requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for AT28HC256-90TU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions for industrial, automotive, and aerospace markets.
The AT28HC256 belongs to Microchip's military-grade parallel EEPROM product line, designed specifically for high-reliability systems requiring guaranteed data integrity, extended temperature operation, and robust write-protection mechanisms.
FAQ
What is the maximum page write size supported by the AT28HC256-90TU-T?
The AT28HC256-90TU-T supports up to 64 bytes per page write operation. All bytes must reside within the same 64-byte page boundary defined by address bits A6–A14. Each subsequent byte must be loaded within 150 µs of the prior one; exceeding this interval triggers automatic internal programming. This capability is implemented in silicon and confirmed in DS20006352A Section 6.8.
Does the AT28HC256-90TU-T require an external programming voltage (VPP)?
No, the AT28HC256-90TU-T operates from a single 5 V ±10% supply and does not require external VPP. Programming is performed using standard VCC levels, enabled by internal charge pumps and hardware write-inhibit logic. This eliminates the need for high-voltage generators or level shifters-confirmed in DS20006352A Section 6.1 and Table 4-2.
How is write completion detected on the AT28HC256-90TU-T?
Write completion is detectable via two independent hardware methods: DATA Polling (reading complemented data on I/O7 until true data appears) and Toggle Bit (observing toggling on I/O6 until it stabilizes). Both are active during the entire write cycle and require no external components-detailed in DS20006352A Sections 6.14 and 6.16.
Is the AT28HC256-90TU-T pin-compatible with standard 28-pin parallel EEPROMs?
No-the AT28HC256-90TU-T uses a 32-lead CLCC package with JEDEC byte-wide pinout, differing from common 28-pin DIP/PLCC footprints. Pin count, physical dimensions, and land pattern are incompatible with 28-pin sockets. Refer to DS20006352A Page 4 for exact 32-pin CLCC layout and pin 1/17 "Don't Connect" designation.
What endurance rating applies to the AT28HC256-90TU-T?
The AT28HC256-90TU-T is rated for 10,000 write/erase cycles under full military temperature and voltage conditions. This value is specified in DS20006352A Section 1 (Features) and Table 4-2 (DC Characteristics), and reflects guaranteed minimum endurance-not typical or best-case data.
AT28HC256-90TU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-TSSOP (0.465", 11.80mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSOP
AT28HC256-90TU-T FAQ
1.How can I place an order for AT28HC256-90TU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC256-90TU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC256-90TU-T reliable?
The price and inventory of AT28HC256-90TU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC256-90TU-T is usually 5 days.
3.What payment methods are accepted for AT28HC256-90TU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC256-90TU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC256-90TU-T?
AT28HC256-90TU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC256-90TU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC256-90TU-T?
For technical support, including AT28HC256-90TU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC256-90TU-T requirements.
6.How does Aetrix verify that AT28HC256-90TU-T is sourced from the original manufacturer or authorized distributors?
All AT28HC256-90TU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC256-90TU-T meets industry standards.
7.What is the process for return or replacement of AT28HC256-90TU-T?
All AT28HC256-90TU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC256-90TU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC256-90TU-T part is unused and in its original packaging.
Return procedure for AT28HC256-90TU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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