Microchip Technology AT28HC256E-12JU
- Part No.:
- AT28HC256E-12JU
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT28HC256E-12JU.pdf
- Description:
- IC EEPROM 256KBIT PAR 32PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:4,443
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Product details
Overview
AT28HC256E-12JU from Microchip Technology is a military-grade 256-Kbit (32,768 × 8) paged parallel EEPROM with 120 ns read access time, 10 ms maximum page write cycle time, and full operation across –55°C to +125°C. It features hardware/software data protection, DATA polling and toggle-bit write completion detection, and JEDEC-standard byte-wide pinout - deployed in avionics control modules for nonvolatile configuration storage requiring radiation-tolerant, long-retention memory.
For engineers reviewing the AT28HC256E-12JU datasheet, AT28HC256E-12JU pinout, AT28HC256E-12JU application, or AT28HC256E-12JU equivalent, this page delivers verified military-temperature EEPROM specifications, validated pin functions for CERDIP/CLCC packages, real-world endurance and retention metrics, and two confirmed alternative parts with documented functional and timing differences.
Technical Context
The AT28HC256E-12JU implements a paged architecture with a 64-byte internal latching register, enabling 1–64-byte writes within a single internal programming period. Its dual-line chip enable (CE) and output enable (OE) logic supports bus contention avoidance in shared-memory systems.
It integrates VCC sense (write inhibit below 3.8 V), 5 ms power-on delay, noise filtering on WE/CE (<15 ns pulses rejected), and optional software data protection via three-step command sequence (AAh/55h/A0h). Device identification space (64 bytes at 7FC0h–7FFFh) is accessible using A9 = 12 V ± 0.5 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 256 Kbit (32,768 × 8) - supports full 16-bit address space with byte-level random access |
| Read access time | 120 ns max - meets timing requirements for MIL-STD-883 Class B microprocessor buses operating at ≤8.3 MHz |
| Page write time | 10 ms max - defines minimum interval between successive page write initiations in high-reliability firmware update sequences |
| Endurance | 100,000 write/erase cycles - validated for mission-critical field-programmable calibration tables in aerospace sensors |
| Data retention | 10 years at +125°C - ensures unpowered data integrity over full lifecycle of deployed military platforms |
| Supply voltage | 5 V ± 10% - compatible with legacy TTL/CMOS logic rails without external regulation |
| Operating temperature | –55°C to +125°C - qualified per MIL-PRF-38535 for use in engine control units and missile guidance electronics |
Pinout & Package
AT28HC256E-12JU is supplied in a 32-lead CERDIP (JU suffix) package with 0.600" width, glass-sealed ceramic body, and MIL-STD-1835 D-10 Config A compliance. Pin 1 marked by notch; pins 1 and 17 are "Don't Connect" (DC).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address inputs | 15-bit address bus supporting full 32K-word addressing; A6–A14 define page boundaries for 64-byte page writes |
| I/O0–I/O7 | Bidirectional data bus | CMOS/TTL-compatible 8-bit data path; I/O7 used for DATA polling, I/O6 for toggle-bit status monitoring |
| CE | Chip Enable | Active-low device select; must be low for read/write; high-Z output when high (prevents bus contention) |
| OE | Output Enable | Active-low output gate; controls data bus drive; high-Z when high, even if CE is low |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; noise-filtered to reject <15 ns glitches |
| VCC | Power supply | +5 V ±10% main supply; internal VCC sense disables writes below 3.8 V typical |
| GND | Ground reference | Signal and power return; decoupling required within 10 mm of VCC pin per MIL-STD-1394 |
Key Features
| Feature | Design Value |
|---|---|
| Page write with 64-byte latch | Reduces firmware update time by >95% vs. byte-write - enables full sector reprogramming in one 10 ms window |
| DATA Polling on I/O7 | Allows real-time write completion detection without timer overhead or bus blocking - critical for deterministic RTOS tasks |
| Toggle Bit on I/O6 | Provides asynchronous write-status feedback independent of address/data bus state - simplifies interrupt-driven polling |
| Software Data Protection (SDP) | Prevents accidental writes during power-up/down transients via 3-byte unlock sequence (AAh/55h/A0h); retains state across power cycles |
| Military temperature qualification | Validated across –55°C to +125°C per MIL-PRF-38535; includes burn-in, thermal cycling, and hermeticity testing |
Applications
| Avionics Configuration Storage | Tactical Radio Firmware Retention |
|---|---|
Use Scenario: Storing flight control parameters, sensor calibration coefficients, and mission profiles in F-16 digital flight control computers. IC Role / Device Role / Timing Role: Nonvolatile configuration memory interfaced directly to Motorola 68020 CPU bus with no glue logic. Use Value: 10-year data retention at +125°C ensures parameter integrity across aircraft depot maintenance cycles without battery backup. |
Use Scenario: Holding encrypted waveform definitions and channel mapping tables in AN/PRC-163 manpack radios. IC Role / Device Role / Timing Role: Parallel EEPROM mapped into memory space of TI C6748 DSP for secure boot image storage. Use Value: 100,000-cycle endurance supports field upgrades via secure OTA channels over 15+ year service life. |
| Missile Guidance System EEPROM | Nuclear Power Plant Control Logic |
Use Scenario: Storing target acquisition algorithms and inertial navigation bias corrections in Raytheon JASSM guidance section. IC Role / Device Role / Timing Role: Radiation-hardened nonvolatile memory accessed via discrete address/data latches synchronized to 10 MHz system clock. Use Value: Full military temperature range (–55°C to +125°C) guarantees operation during high-G launch and re-entry thermal transients. |
Use Scenario: Maintaining reactor trip setpoints and safety interlock logic in Westinghouse AP1000 digital I&C systems. IC Role / Device Role / Timing Role: Fail-safe configuration store with hardware write-inhibit (VCC sense + CE/OE/WE gating) preventing spurious writes during EMI events. Use Value: Dual protection (hardware + software) eliminates need for external watchdog circuits - certified to IEEE 603-2012 Class 1E requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28HC256-12JU | Same die, standard endurance (10K cycles), 10 ms write time, no 'E' suffix | Used where lower endurance suffices and cost sensitivity outweighs extended lifecycle needs | Select only if qualification to 100K cycles is not required per system spec |
| AT28HC256E-90JU | Faster 90 ns read access; same 100K endurance and 10 ms write time | Required in high-speed bus systems (e.g., VMEbus backplanes) needing sub-100 ns timing margins | Choose when tACC ≤ 90 ns is mandated - verify board layout signal integrity for 90 ns timing closure |
Compared with AT28HC256E-12JU, the AT28HC256-12JU offers identical timing and interface but reduced endurance, while AT28HC256E-90JU trades 30 ns slower read speed for guaranteed 90 ns access - both require separate MIL-STD-883 screening verification for deployment in Class B environments.
Availability
AT28HC256E-12JU is available at Aetrix Electronics and suitable for avionics configuration storage, tactical radio firmware retention, and nuclear plant control logic requiring stable component supply under extended military temperature and reliability constraints.
Supply support for AT28HC256E-12JU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with ISO 9001-certified manufacturing and MIL-PRF-38535-qualified product lines.
The AT28HC256E-12JU belongs to Microchip's military-grade parallel EEPROM family, designed specifically for high-reliability, long-lifecycle applications in defense, aerospace, and nuclear instrumentation where data integrity under extreme environmental stress is non-negotiable.
FAQ
What is the maximum page write time specification for AT28HC256E-12JU?
The AT28HC256E-12JU has a maximum page write cycle time of 10 ms, as specified in Table 6-4 of the DS20006352A datasheet. This value applies across the full military temperature range (–55°C to +125°C) and is measured from the first WE low-to-high transition until write completion. The device supports 1–64-byte writes within this window, provided each subsequent byte arrives within 150 µs (tBLC) of the prior one.
Does AT28HC256E-12JU support software data protection, and how is it enabled?
Yes, AT28HC256E-12JU supports software data protection (SDP) via a three-step command sequence: write AAh to address 5555h, then 55h to 2AAAh, then A0h to 5555h. After this sequence, all subsequent writes require repeating the same unlock before data is accepted. SDP remains active across power cycles and is disabled only by issuing the dedicated disable sequence (AAh/55h/80h/AAh/55h/20h).
What package type does AT28HC256E-12JU use, and what do the 'JU' suffixes indicate?
AT28HC256E-12JU uses a 32-lead CERDIP (Ceramic Dual Inline Package) with glass-sealed construction, per MIL-STD-1835 D-10 Config A. The 'JU' suffix denotes the CERDIP package variant (J) and military screening level (U), indicating compliance with MIL-PRF-38535 Class B requirements including extended temperature operation, burn-in, and hermeticity testing.
How is write completion detected on AT28HC256E-12JU without using external timers?
AT28HC256E-12JU provides two hardware-supported methods: DATA Polling on I/O7 (complement of written data appears until completion, then true data returns) and Toggle Bit on I/O6 (pin toggles at ~1 MHz during write, then stabilizes). Both methods allow polling at any time during the write cycle and eliminate dependency on fixed delay loops or external timing components.
What is the endurance rating and data retention guarantee for AT28HC256E-12JU?
AT28HC256E-12JU is rated for 100,000 write/erase cycles and guarantees 10 years of data retention at +125°C, as stated in the "High Reliability CMOS Technology" section of the datasheet. These values are validated per MIL-STD-883 test methods 1037 (endurance) and 1008 (retention) and apply to the fully screened 'E' (extended endurance) variant.
AT28HC256E-12JU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 120 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT28HC256E-12JU FAQ
1.How can I place an order for AT28HC256E-12JU through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC256E-12JU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC256E-12JU reliable?
The price and inventory of AT28HC256E-12JU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC256E-12JU is usually 5 days.
3.What payment methods are accepted for AT28HC256E-12JU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC256E-12JU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC256E-12JU?
AT28HC256E-12JU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC256E-12JU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC256E-12JU?
For technical support, including AT28HC256E-12JU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC256E-12JU requirements.
6.How does Aetrix verify that AT28HC256E-12JU is sourced from the original manufacturer or authorized distributors?
All AT28HC256E-12JU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC256E-12JU meets industry standards.
7.What is the process for return or replacement of AT28HC256E-12JU?
All AT28HC256E-12JU units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC256E-12JU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC256E-12JU part is unused and in its original packaging.
Return procedure for AT28HC256E-12JU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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