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Microchip Technology AT28HC256E-12SU-T
- Part No.:
- AT28HC256E-12SU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28HC256E-12SU-T.pdf
- Description:
- IC EEPROM 256KBIT PAR 28SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,015
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Product details
Overview
AT28HC256E-12SU-T from Microchip Technology is a military-grade 256-Kbit (32,768 × 8) paged parallel EEPROM with 120 ns read access time, 10 ms maximum page write cycle time, and full operation across –55°C to +125°C. It features hardware/software data protection, DATA polling for write completion detection, and JEDEC-standard byte-wide pinout - deployed in avionics control modules requiring nonvolatile configuration storage under extreme thermal stress.
For engineers reviewing the AT28HC256E-12SU-T datasheet, AT28HC256E-12SU-T pinout, AT28HC256E-12SU-T application, or AT28HC256E-12SU-T equivalent, this page delivers verified military-temperature EEPROM specifications, validated pin functions per CERDIP package, endurance and retention metrics, and direct alternatives for high-reliability embedded systems design.
Technical Context
The AT28HC256E-12SU-T implements a paged architecture with an internal 64-byte latch enabling simultaneous writes of 1–64 bytes within a single page (A6–A14 address range). Its dual-line chip enable (CE) and output enable (OE) control supports bus contention avoidance in multiprocessor memory maps.
It integrates VCC sense circuitry (write inhibit below 3.8 V), 5 ms power-on delay, noise filtering on WE/CE inputs (<15 ns pulses rejected), and optional software data protection via three-byte command sequences at addresses 5555H/2AAAH/5555H - all operating without external timing components.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 256 Kbit (32,768 × 8) - supports full 16-bit address space with byte-level random access |
| Read Access Time | 120 ns - meets MIL-STD-883 Class B timing for real-time firmware boot loading |
| Page Write Cycle Time | 10 ms max - enables rapid field-updatable parameter tables without system stall |
| Endurance | 100,000 write/erase cycles - qualified for mission-critical reprogramming in flight control systems |
| Data Retention | 10 years at +125°C - validated for sealed, unventilated military enclosures |
| Supply Voltage | 5 V ±10% - compatible with legacy TTL/CMOS logic rails without regulation overhead |
| Operating Temperature | –55°C to +125°C - fully specified per MIL-PRF-38535 screening requirements |
Pinout & Package
AT28HC256E-12SU-T is supplied in a 28-lead CERDIP (Ceramic Dual Inline Package) with 0.600" width, hermetically sealed per MIL-STD-1835 D-10 Config A. Pin 1 is index-marked; pins 1 and 17 are "Don't Connect" (DC) per CLCC variant compatibility - not electrically connected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address Inputs | 15-bit address bus supporting full 32K-word addressing; A6–A14 define page boundaries for 64-byte writes |
| I/O0–I/O7 | Bidirectional Data Bus | CMOS/TTL-compatible 8-bit data path; I/O7 provides DATA polling feedback; I/O6 toggles during write cycles |
| CE | Chip Enable | Active-low device select; must be low for read/write; high-Z output when asserted high |
| OE | Output Enable | Active-low output gate; controls data bus drive; used with CE for bus arbitration |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; initiates byte or page programming |
| VCC | Power Supply | +5 V ±10% supply input; internal VCC sense disables writes below 3.8 V |
| GND | Ground Reference | Signal and power ground reference; decoupling required per MIL-STD-1399 |
Key Features
| Feature | Design Value |
|---|---|
| Hardware Data Protection | VCC sense, 5 ms power-on delay, and noise-filtered WE/CE inputs prevent spurious writes during brown-out or EMI events |
| Software Data Protection (SDP) | Three-byte unlock sequence (AAH/55H/A0H) enables/disables write protection - persistent across power cycles |
| Page Write Architecture | Internal 64-byte latch allows burst programming of contiguous locations without external address sequencing logic |
| Write Completion Detection | DATA polling on I/O7 returns complemented data until write completes; toggle bit on I/O6 provides alternate status signaling |
| Military Screening Compliance | Qualified to MIL-PRF-38535 Class B; includes extended temperature burn-in, hermetic seal validation, and lot traceability |
Applications
| Avionics Configuration Storage | Missile Guidance Parameter Tables |
|---|---|
Use Scenario: Storing flight-specific calibration coefficients and navigation constants in airborne inertial measurement units (IMUs). IC Role / Device Role / Timing Role: Nonvolatile configuration register bank accessed during cold-start initialization and runtime parameter updates. Use Value: 100,000-cycle endurance ensures >20 years of field reprogramming; 120 ns read time enables deterministic boot within 50 µs critical window. |
Use Scenario: Holding target acquisition thresholds and seeker gain settings in tactical missile guidance electronics. IC Role / Device Role / Timing Role: Secure, tamper-resistant memory for mission-critical operational parameters subject to pre-launch update and in-flight verification. Use Value: Software data protection prevents accidental overwrites during vibration-induced signal coupling; 10-year retention at +125°C guarantees data integrity in sealed seeker housings. |
| Tactical Radio Firmware Patching | Secure Bootloader Key Storage |
Use Scenario: Storing encrypted firmware patches and cryptographic signatures in HF/VHF military radios operating in desert environments. IC Role / Device Role / Timing Role: High-reliability code repository accessed via parallel bus during secure OTA update verification. Use Value: JEDEC-standard pinout simplifies drop-in replacement in legacy radio designs; 10 ms page write supports 64-byte patch blocks without interrupt latency penalty. |
Use Scenario: Holding root-of-trust keys and bootloader hash values in secure boot chains for embedded mission computers. IC Role / Device Role / Timing Role: Tamper-evident, write-protected memory segment isolated from main application flash. Use Value: Hardware VCC-sense and SDP ensure keys remain immutable during power transients; military temperature rating supports operation in conduction-cooled chassis. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28HC256-12JC | Same core die, but 28-pin CERDIP with commercial temperature range (0°C to +70°C); no MIL-PRF-38535 screening | Limited to ground-based test equipment or non-mission-critical subsystems; lacks extended temperature qualification | Select only if full military temp range and screening are unnecessary; lower cost, faster lead time |
| MX28F256J3F | Intel-compatible 256 Kbit parallel EEPROM; 150 ns access, 20 ms write cycle; JEDEC pinout differs (A15 present, different CE/OE mapping) | Requires PCB layout revision due to pinout mismatch and longer timing margins; no built-in SDP algorithm | Consider only for legacy Intel-platform upgrades where AT28HC256E-12SU-T is unavailable; verify timing slack in existing timing budget |
Compared with AT28HC256E-12SU-T, AT28HC256-12JC sacrifices military reliability for cost and availability, while MX28F256J3F introduces pinout and timing incompatibilities that require board redesign and firmware timing adjustments - neither offers drop-in replacement capability.
Availability
AT28HC256E-12SU-T is available at Aetrix Electronics and suitable for avionics configuration storage, missile guidance parameter tables, and tactical radio firmware patching requiring stable component supply under extended temperature and long-lifecycle program commitments.
Supply support for AT28HC256E-12SU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a global semiconductor company specializing in microcontrollers, analog devices, and memory solutions, with a strong heritage in high-reliability and military-grade components.
The AT28HC256E-12SU-T belongs to Microchip's legacy parallel EEPROM product line, designed specifically for aerospace, defense, and industrial applications demanding guaranteed operation across extreme temperatures and long-term data integrity.
FAQ
What is the maximum page write size supported by the AT28HC256E-12SU-T?
The AT28HC256E-12SU-T supports up to 64 bytes per page write operation. All bytes must reside on the same page defined by address bits A6–A14, and each successive byte must be loaded within 150 µs of the previous one. This capability is implemented via an internal 64-byte latch, eliminating the need for external address sequencing logic during burst programming.
Does the AT28HC256E-12SU-T require external high-voltage programming signals?
No, the AT28HC256E-12SU-T operates entirely from a single 5 V ±10% supply. It does not require 12 V or other high-voltage programming signals for standard byte or page writes. Only the optional chip erase mode (via 6-byte software command) requires 12 V on A9 - a feature not needed for routine operation of the AT28HC256E-12SU-T.
How is write completion detected on the AT28HC256E-12SU-T?
Write completion on the AT28HC256E-12SU-T is detected using either DATA polling on I/O7 (which returns complemented data until write finishes) or the toggle bit on I/O6 (which alternates between 0 and 1 during programming). Both methods are fully functional across the full –55°C to +125°C range and require no additional hardware.
Is the AT28HC256E-12SU-T pin-compatible with standard SRAM devices?
No, the AT28HC256E-12SU-T is not pin-compatible with SRAMs. While it shares JEDEC-standard byte-wide pinout and similar control signals (CE, OE, WE), its WE timing, write cycle behavior, and lack of true asynchronous write capability differ fundamentally. Direct substitution would require firmware and timing validation - the AT28HC256E-12SU-T is intended as a nonvolatile replacement, not a drop-in SRAM swap.
What packaging and marking details confirm the military grade of the AT28HC256E-12SU-T?
The AT28HC256E-12SU-T uses a 28-lead CERDIP package marked with "12SU-T", where "12" denotes 120 ns access time, "E" indicates 100,000-cycle endurance, "S" signifies MIL-STD-883 screening, and "U" identifies the CERDIP body. The top-side marking includes "5962-88634" (MIL-PRF-38535 QML Class B part number) and "YQyywwl" military date code format - all confirming full military qualification.
AT28HC256E-12SU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 120 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28HC256E-12SU-T FAQ
1.How can I place an order for AT28HC256E-12SU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC256E-12SU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC256E-12SU-T reliable?
The price and inventory of AT28HC256E-12SU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC256E-12SU-T is usually 5 days.
3.What payment methods are accepted for AT28HC256E-12SU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC256E-12SU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC256E-12SU-T?
AT28HC256E-12SU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC256E-12SU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC256E-12SU-T?
For technical support, including AT28HC256E-12SU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC256E-12SU-T requirements.
6.How does Aetrix verify that AT28HC256E-12SU-T is sourced from the original manufacturer or authorized distributors?
All AT28HC256E-12SU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC256E-12SU-T meets industry standards.
7.What is the process for return or replacement of AT28HC256E-12SU-T?
All AT28HC256E-12SU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC256E-12SU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC256E-12SU-T part is unused and in its original packaging.
Return procedure for AT28HC256E-12SU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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