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Microchip Technology AT28HC256E-90JU-T
- Part No.:
- AT28HC256E-90JU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT28HC256E-90JU-T.pdf
- Description:
- IC EEPROM 256KBIT PAR 32PLCC
- Quantity:
- Payment:
- Shipping:
Inventory:1,543
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Product details
Overview
AT28HC256E-90JU-T from Microchip Technology is a 256-Kbit (32,768 × 8) parallel EEPROM with 90 ns read access time, JEDEC-standard byte-wide pinout, single 5V ±10% supply, and industrial temperature range (−40°C to +85°C). It supports automatic 1–64-byte page writes with internal latching and data polling for write completion detection, used in firmware storage, configuration memory, and boot code retention in embedded controllers.
For engineers reviewing the AT28HC256E-90JU-T datasheet, AT28HC256E-90JU-T pinout, AT28HC256E-90JU-T application, or AT28HC256E-90JU-T equivalent, key selection considerations include its 90 ns read timing, 10 ms max page write cycle, hardware/software data protection, CMOS/TTL compatibility, and PLCC-32 packaging with RoHS-compliant green finish.
Technical Context
The AT28HC256E-90JU-T implements a static RAM-compatible parallel interface with dual-line chip enable (CE) and output enable (OE) control, enabling bus contention avoidance in multi-device systems. Its internal 64-byte page register allows burst loading of up to 64 bytes within 150 µs per byte, with address latching on CE/WE falling edge and data latching on rising edge.
Write completion is verified via DATA Polling (I/O7 complement toggle) or Toggle Bit (I/O6 state alternation), both operable at any point during write cycles. Hardware protection includes VCC sense (<3.8 V inhibits writes), 5 ms power-on delay, noise filtering (<15 ns pulse rejection), and CE/OE/WE logic gating - all active without software intervention.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 256 Kbit (32,768 × 8) - provides sufficient nonvolatile storage for boot code, calibration tables, and device configuration in resource-constrained microcontroller systems. |
| Read Access Time | 90 ns - enables direct replacement of SRAM in legacy 8-bit/16-bit bus architectures without timing redesign. |
| Page Write Cycle | ≤10 ms - reduces firmware update latency versus byte-by-byte programming; supports efficient field upgrades of parameter sets. |
| Supply Voltage | 5V ±10% - interoperates with standard TTL/CMOS logic families and legacy 5V system rails without level-shifting. |
| Operating Temperature | −40°C to +85°C - qualified for industrial automation, motor drives, and outdoor instrumentation environments. |
| Endurance | 100,000 write cycles - supports frequent reconfiguration in programmable logic controllers and test equipment. |
| Data Retention | 10 years - ensures long-term reliability of stored calibration coefficients and security keys without refresh. |
| Power Dissipation | 80 mA active / 3 mA standby - minimizes thermal load in densely packed PCBs while enabling low-power sleep modes. |
Pinout & Package
AT28HC256E-90JU-T is packaged in a 32-lead Plastic Leaded Chip Carrier (PLCC) with gull-wing leads, RoHS-compliant green finish, and JEDEC-standard footprint. Pin 1 is marked by a corner chamfer; pins 1 and 17 are "Don't Connect" (DC) and must remain unconnected per datasheet.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address Inputs | 15-bit address bus supporting full 32K-word addressing; A6–A14 define page boundaries for 64-byte page writes. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface compatible with 8051, Z80, and 68K family buses; high-impedance when CE or OE is high. |
| CE | Chip Enable | Active-low global select; disables outputs and inhibits writes when high; required for multi-chip decoding. |
| OE | Output Enable | Active-low output gate; enables data readout only when CE is also low - prevents bus contention during shared-bus operation. |
| WE | Write Enable | Active-low write strobe; initiates byte or page write on falling edge; latches data on subsequent rising edge. |
| VCC | Power Supply | +5V ±10% input; powers core logic and I/O buffers; requires local 0.1 µF ceramic decoupling. |
| GND | Ground Reference | Signal and power return path; must be connected to system ground plane with low-inductance routing. |
| NC | No Connect | Pins 12 and 26 - electrically isolated; no trace or pad connection permitted. |
| DC | Don't Connect | Pins 1 and 17 - mechanical alignment features only; must remain floating and unconnected. |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-Wide Pinout | Direct drop-in replacement for industry-standard 27C256 EPROMs and 62256 SRAMs in existing PCB layouts. |
| Hardware Data Protection | VCC sensing, 5 ms power-on delay, and noise filtering eliminate need for external reset supervisors or RC timing circuits. |
| Software Data Protection (SDP) | Three-step command sequence (AAh/55h/A0h) enables/disables write lock without hardware modification - ideal for field firmware updates. |
| 64-Byte Page Register | Reduces host CPU overhead by allowing burst writes; eliminates need for external address/data latches in microcontroller-based programmers. |
| DATA Polling & Toggle Bit | Dual asynchronous write-complete detection methods eliminate fixed delays and improve system throughput in real-time applications. |
| Device Identification Area | 64-byte reserved sector (7FC0H–7FFFH) accessible at 12V on A9 enables unique serialization and traceability without consuming main array space. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Memory |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory automation. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed during power-up and runtime via parallel bus; 90 ns read time ensures minimal scan-cycle overhead. Use Value: 100,000 write cycles support daily recalibration; hardware write protection prevents corruption during brown-out events. | Use Scenario: Retaining sensor calibration coefficients, patient history flags, and safety-critical firmware signatures in portable diagnostic equipment. IC Role / Device Role / Timing Role: Secure boot memory holding cryptographic keys and integrity hashes; accessed once per power cycle with deterministic 90 ns latency. Use Value: 10-year data retention meets FDA Class II device longevity requirements; SDP prevents unauthorized firmware tampering. |
| Legacy Industrial Controller Boot ROM | Test Equipment Firmware Update Storage |
Use Scenario: Replacing obsolete 27C256 EPROMs in aging CNC machine controllers where PCB layout cannot be modified. IC Role / Device Role / Timing Role: Pin-compatible parallel boot memory mapped to address 0x0000–0x7FFF; operates at 5V with TTL-level signaling. Use Value: JEDEC pinout and 90 ns timing ensure zero-change integration; 10 ms page write enables fast field updates via RS-232 host. | Use Scenario: Holding downloadable test algorithms, fixture configuration files, and self-test routines in automated test systems requiring frequent firmware revisions. IC Role / Device Role / Timing Role: Field-upgradable firmware repository accessed over ISA or LPC bus; page write mode reduces update time by 60× vs. byte writes. Use Value: 64-byte page buffer and DATA Polling allow host CPU to perform other tasks during 10 ms writes - improving test throughput. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28HC256-90JU | Same die, identical electrical specs, but rated for 10,000 write cycles (vs. 100,000) and lacks 'E' endurance marking. | Suitable for infrequently updated configurations; not recommended for daily calibration logging. | Select AT28HC256E-90JU-T when >10,000 write cycles or extended endurance certification is required. |
| MN5Q256A-90PL | 32-pin PLCC, 90 ns read, but uses 5V-only write voltage (no 12V chip erase); 50,000 cycle endurance; different SDP command set. | Lacks 12V chip erase and device ID area; incompatible SDP algorithm prevents firmware portability. | Choose MN5Q256A-90PL only if legacy system already uses its specific protection scheme and chip erase is unnecessary. |
Compared with AT28HC256-90JU, the AT28HC256E-90JU-T delivers 10× higher endurance and guaranteed extended life; versus MN5Q256A-90PL, it offers superior data security via 12V-activated chip erase and standardized Microchip SDP, making it preferable for safety-critical or field-upgradable designs.
Availability
AT28HC256E-90JU-T is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics, legacy controller retrofits, and automated test equipment requiring stable component supply across multi-year production lifecycles.
Supply support for AT28HC256E-90JU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology Inc. is a leading provider of microcontrollers, analog devices, and memory solutions, headquartered in Chandler, Arizona, with global design and manufacturing operations.
The AT28HC256 product line delivers high-reliability parallel EEPROMs optimized for industrial and automotive applications requiring robust data retention, deterministic timing, and hardware-enforced write protection - targeting systems where firmware integrity and long-term field operation are critical.
FAQ
What is the maximum page write cycle time for AT28HC256E-90JU-T?
The AT28HC256E-90JU-T has a maximum page write cycle time of 10 ms, as specified in the datasheet for standard endurance grade devices. This value applies to all 1–64-byte writes within a single page (defined by A6–A14). The 'E' suffix denotes extended endurance (100,000 cycles), but does not alter the 10 ms timing specification - faster 3 ms operation requires the 'F' variant (AT28HC256F-90JU-T).
Does AT28HC256E-90JU-T support 12V chip erase?
Yes, AT28HC256E-90JU-T supports optional 12V chip erase using a 6-byte software command sequence. This feature requires raising A9 to 12.0 V ± 0.5 V during the erase command window. The 12V signal is applied only to A9; all other pins remain at 5V. Full details are in Application Note AN0544, available on Microchip's website.
How does hardware write protection work on AT28HC256E-90JU-T?
AT28HC256E-90JU-T implements four hardware write protection mechanisms: (1) VCC sense circuitry inhibits writes if supply drops below ~3.8 V; (2) a 5 ms internal timer blocks writes after power-on until VCC stabilizes; (3) write is disabled if CE is high, OE is low, or WE is high; and (4) input noise filters reject pulses <15 ns on CE/WE. These operate independently of software settings.
Can AT28HC256E-90JU-T be used as a direct replacement for AT28HC256-90JU?
Yes, AT28HC256E-90JU-T is pin-, package-, and timing-compatible with AT28HC256-90JU, sharing identical 32-lead PLCC footprint, 90 ns read access, and JEDEC pinout. The only functional difference is endurance: AT28HC256E-90JU-T guarantees 100,000 write cycles versus 10,000 for the non-E version. No PCB or firmware changes are needed for upgrade.
What is the purpose of the 64-byte device identification area in AT28HC256E-90JU-T?
The 64-byte device identification area (addresses 7FC0H–7FFFH) in AT28HC256E-90JU-T is reserved for user-defined serialization, calibration traceability, or manufacturing lot tracking. Access requires applying 12V ± 0.5V to A9 while performing standard read/write cycles - isolating this area from main memory to prevent accidental overwrite during normal operation.
AT28HC256E-90JU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (11.43x13.97)
AT28HC256E-90JU-T FAQ
1.How can I place an order for AT28HC256E-90JU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC256E-90JU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC256E-90JU-T reliable?
The price and inventory of AT28HC256E-90JU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC256E-90JU-T is usually 5 days.
3.What payment methods are accepted for AT28HC256E-90JU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC256E-90JU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC256E-90JU-T?
AT28HC256E-90JU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC256E-90JU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC256E-90JU-T?
For technical support, including AT28HC256E-90JU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC256E-90JU-T requirements.
6.How does Aetrix verify that AT28HC256E-90JU-T is sourced from the original manufacturer or authorized distributors?
All AT28HC256E-90JU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC256E-90JU-T meets industry standards.
7.What is the process for return or replacement of AT28HC256E-90JU-T?
All AT28HC256E-90JU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC256E-90JU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC256E-90JU-T part is unused and in its original packaging.
Return procedure for AT28HC256E-90JU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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