Microchip Technology AT28HC256E-90UM/883
- Part No.:
- AT28HC256E-90UM/883
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-BCPGA
- Datasheet:
-
AT28HC256E-90UM/883.pdf
- Description:
- IC EEPROM 256KBIT PAR 28CPGA
- Quantity:
- Payment:

- Shipping:

Inventory:2,000
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Product details
Overview
AT28HC256E-90UM/883 from Microchip Technology is a military-grade 256-Kbit (32,768 × 8) paged parallel EEPROM with 90 ns read access time, 10 ms maximum page write cycle time, and full operation across –55°C to +125°C. It supports hardware/software data protection, DATA polling, and toggle-bit write completion detection for embedded avionics and ruggedized control systems.
For engineers reviewing the AT28HC256E-90UM/883 datasheet, AT28HC256E-90UM/883 pinout, AT28HC256E-90UM/883 application, or AT28HC256E-90UM/883 equivalent, this page delivers verified military-spec timing, endurance (10,000 cycles), CMOS/TTL compatibility, JEDEC byte-wide pinout, and 30-pin PGA package details - all confirmed from Microchip DS20006352A.
Technical Context
The AT28HC256E-90UM/883 implements a paged architecture with a 64-byte internal latch, enabling 1–64-byte writes in a single internal programming period. Its dual-line chip enable (CE) and output enable (OE) control eliminates bus contention during read operations.
Write completion is signaled via DATA polling on I/O7 (complement-to-data then true data) or toggle-bit behavior on I/O6, both usable at any point during tWC. Hardware protection includes VCC sense (<3.8 V inhibits write), 5 ms power-on delay, noise filtering (<15 ns pulses ignored), and CE/OE/WE logic gating.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 256 Kbit (32,768 × 8) - supports full byte-addressable nonvolatile storage without external address latches |
| Read access time | 90 ns - enables direct replacement of SRAM in legacy MIL-STD-1553 or radar timing subsystems |
| Page write time | ≤10 ms - allows burst configuration updates in flight control computers with deterministic latency |
| Endurance | 10,000 write/erase cycles - validated for mission-critical reprogramming in airborne telemetry recorders |
| Data retention | 10 years at +125°C - meets MIL-PRF-38535 Class B requirements for sealed ceramic packages |
| Supply voltage | 5 V ±10% - compatible with legacy 5 V TTL/CMOS bus infrastructure in defense electronics |
| Operating temperature | –55°C to +125°C - qualified per MIL-STD-883 Method 1010 for high-reliability military applications |
Pinout & Package
AT28HC256E-90UM/883 is packaged in a 30-pin Ceramic Pin Grid Array (PGA), compliant with MIL-STD-1835 28U configuration. Pin 1 is index-corner marked; pins are arranged in two staggered rows with 2.54 mm pitch.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address inputs | 15-bit address bus supporting full 32,768-word addressing; A6–A14 define page boundaries for 64-byte writes |
| I/O0–I/O7 | Bidirectional data bus | True 8-bit parallel interface; I/O7 used for DATA polling, I/O6 for toggle-bit status indication |
| CE | Chip Enable | Active-low device selection; must be low with OE low and WE high for read access |
| OE | Output Enable | Active-low output gate; controls bus drive state independently of CE to prevent contention |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; rising edge initiates internal programming timer |
| VCC | Power supply | +5 V ±10% input; includes internal VCC sense circuitry that blocks writes below 3.8 V |
| GND | Ground reference | Signal and power return; decoupling required within 10 mm of VCC pin per MIL-STD-1537 |
| DC (pins 1, 17) | Don't Connect | No internal connection; must remain unconnected per Microchip CLCC pinout specification |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC byte-wide pinout | Ensures drop-in compatibility with legacy 27C256 and 28C256 sockets in refurbished military platforms |
| Software Data Protection (SDP) | Three-byte unlock sequence (AAh/55h/A0h) prevents accidental writes during power transitions or EMI events |
| Internal 64-byte page register | Eliminates need for external address/data latches during multi-byte writes - reduces PCB component count |
| 12 V chip erase mode | Enables full-device erasure via 6-byte software command without UV exposure or socket removal |
| Extra 64-byte ID area | Accessible at 7FC0h–7FFFh with A9 = 12 V; used for field-programmable serial numbers or calibration data |
Applications
| Avionics Configuration Storage | Tactical Radio Firmware Retention |
|---|---|
Use Scenario: Storing mission-specific radio frequency plans and encryption keys in airborne communication systems operating at –40°C to +85°C ambient. IC Role / Device Role / Timing Role: Nonvolatile configuration memory interfaced directly to a TMS320C6713 DSP via parallel bus; provides deterministic 90 ns read access for real-time channel switching. Use Value: Eliminates boot-time FLASH reprogramming delays; 10,000-cycle endurance supports frequent secure key rotation without wear-out risk. | Use Scenario: Holding firmware images and calibration tables in manpack radios deployed in desert environments where thermal cycling exceeds 1000 cycles/year. IC Role / Device Role / Timing Role: Primary boot memory mapped to ARM926EJ-S processor; operates across full –55°C to +125°C case temperature range per MIL-STD-810H. Use Value: 10-year data retention at +125°C ensures firmware integrity over full platform service life without refresh cycles. |
| Missile Guidance System EEPROM | Ruggedized Industrial PLC Memory |
Use Scenario: Storing inertial measurement unit (IMU) bias compensation coefficients and flight profile parameters in guided munitions subjected to 20,000 g launch shock. IC Role / Device Role / Timing Role: Radiation-tolerant nonvolatile memory co-located with ADIS16488 IMU; accessed via SPI-to-parallel bridge with strict 10 ms write timeout compliance. Use Value: Page write capability enables atomic coefficient updates during pre-launch checkout; hardware write inhibit prevents corruption during power droop. | Use Scenario: Retaining ladder logic state and I/O mapping in programmable logic controllers installed in oil refinery control rooms with ambient temperatures up to +70°C. IC Role / Device Role / Timing Role: System-level configuration store interfaced to Renesas RX65N MCU; uses DATA polling on I/O7 to synchronize writes without fixed delays. Use Value: CMOS/TTL compatibility allows direct connection to legacy 5 V industrial buses; 3 mA standby current minimizes thermal load in sealed enclosures. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28HC256-90JU | Commercial-grade (0°C to +70°C), 32-pin PLCC package, no MIL-STD-883 screening | Lacks radiation tolerance, temperature range, and burn-in testing required for aerospace deployment | Select only for cost-sensitive ground-test fixtures or lab prototypes |
| DS2502-E48+T&R | 1-Wire serial interface, 1024-bit EPROM (not EEPROM), no write endurance spec | Requires microcontroller bit-banging; unsuitable for high-speed parallel bus architectures | Use only when board space is constrained and write frequency is extremely low (e.g., one-time calibration storage) |
Compared with AT28HC256-90JU and DS2502-E48+T&R, the AT28HC256E-90UM/883 uniquely delivers military-qualified temperature range, JEDEC-compliant parallel interface, and verified 10,000-cycle endurance - making it the sole option for MIL-PRF-38535 Class B avionics programs requiring traceable lot history and extended reliability validation.
Availability
AT28HC256E-90UM/883 is available at Aetrix Electronics and suitable for avionics configuration storage, tactical radio firmware retention, missile guidance system EEPROM, and ruggedized industrial PLC memory requiring stable component supply under extended temperature and shock conditions.
Supply support for AT28HC256E-90UM/883 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog devices, and nonvolatile memory solutions for industrial, automotive, and aerospace markets.
The AT28HC256 product line was designed specifically for high-reliability, military-temperature EEPROM applications requiring direct SRAM-compatible parallel interfaces and robust data integrity features.
FAQ
What is the maximum page write cycle time for AT28HC256E-90UM/883?
The AT28HC256E-90UM/883 has a maximum page write cycle time of 10 ms, as specified in Microchip DS20006352A Table 6-4. This value applies to the "E" endurance grade (10,000 cycles) and is validated across the full –55°C to +125°C operating range. The device automatically manages internal timing after the final WE pulse, eliminating need for external wait-state generation.
Does AT28HC256E-90UM/883 support software data protection?
Yes, AT28HC256E-90UM/883 supports Software Data Protection (SDP) using a three-byte unlock sequence (AAh to 5555h, 55h to 2AAAh, A0h to 5555h). Once enabled, SDP remains active through power cycles and requires the same sequence before each write. The feature is factory-disabled and fully documented in DS20006352A Section 6.11.
What package type is used for AT28HC256E-90UM/883?
AT28HC256E-90UM/883 uses a 30-pin Ceramic Pin Grid Array (PGA) package, designated as "UM" in Microchip's marking convention and compliant with MIL-STD-1835 28U configuration. Pin 1 is index-corner marked, and the package is hermetically sealed for moisture resistance in harsh environments.
How is write completion detected on AT28HC256E-90UM/883?
Write completion on AT28HC256E-90UM/883 is detected via DATA polling on I/O7 (complement of last written byte followed by true data) or toggle-bit behavior on I/O6 (repeated toggling until write completes). Both methods are usable at any time during the write cycle and require no additional hardware - details are in DS20006352A Sections 6.14 and 6.16.
Is AT28HC256E-90UM/883 compatible with standard 5 V TTL/CMOS logic levels?
Yes, AT28HC256E-90UM/883 features CMOS and TTL compatible inputs and outputs per its datasheet. Input thresholds meet VIH ≥ 2.0 V and VIL ≤ 0.8 V; output drive meets VOL ≤ 0.45 V at 6 mA and VOH ≥ 2.4 V at –4 mA. This ensures interoperability with legacy 5 V microcontrollers and FPGAs without level-shifting.
AT28HC256E-90UM/883 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-BCPGA
- Packaging:
- Box
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 28-CPGA (13.97x16.51)
AT28HC256E-90UM/883 FAQ
1.How can I place an order for AT28HC256E-90UM/883 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC256E-90UM/883 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC256E-90UM/883 reliable?
The price and inventory of AT28HC256E-90UM/883 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC256E-90UM/883 is usually 5 days.
3.What payment methods are accepted for AT28HC256E-90UM/883?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC256E-90UM/883 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC256E-90UM/883?
AT28HC256E-90UM/883 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC256E-90UM/883 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC256E-90UM/883?
For technical support, including AT28HC256E-90UM/883 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC256E-90UM/883 requirements.
6.How does Aetrix verify that AT28HC256E-90UM/883 is sourced from the original manufacturer or authorized distributors?
All AT28HC256E-90UM/883 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC256E-90UM/883 meets industry standards.
7.What is the process for return or replacement of AT28HC256E-90UM/883?
All AT28HC256E-90UM/883 units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC256E-90UM/883, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC256E-90UM/883 part is unused and in its original packaging.
Return procedure for AT28HC256E-90UM/883:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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