Microchip Technology AT28HC256F-90FM/883
- Part No.:
- AT28HC256F-90FM/883
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-CFlatPack
- Datasheet:
-
AT28HC256F-90FM/883.pdf
- Description:
- IC EEPROM 256KBIT PAR 28FLATPK
- Quantity:
- Payment:

- Shipping:

Inventory:3,961
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT28HC256F-90FM/883 from Microchip Technology is a military-grade 256-Kbit (32,768 × 8) paged parallel EEPROM with 90 ns read access time, 3 ms maximum page write cycle time, and full −55°C to +125°C operation. It features hardware/software data protection, DATA polling for write completion detection, and JEDEC-standard byte-wide pinout. Used in avionics control modules requiring nonvolatile storage with high reliability and radiation-tolerant packaging.
For engineers reviewing the AT28HC256F-90FM/883 datasheet, AT28HC256F-90FM/883 pinout, AT28HC256F-90FM/883 application, or AT28HC256F-90FM/883 equivalent, key selection considerations include military temperature compliance, 3 ms fast page write capability, CMOS/TTL compatibility, 10,000-cycle endurance, and 32-lead flatpack package with MIL-STD-883 screening.
Technical Context
The AT28HC256F-90FM/883 implements a paged architecture with an internal 64-byte latch enabling simultaneous writes of 1–64 bytes per cycle. Its dual-line chip enable (CE) and output enable (OE) control supports bus contention avoidance in multiprocessor systems.
Write operations are protected by VCC sense (inhibit below 3.8 V), 5 ms power-on delay, noise filtering on WE/CE (<15 ns pulses rejected), and optional software data protection via three-byte unlock sequence. End-of-write detection uses either DATA polling on I/O7 or toggle-bit monitoring on I/O6.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory size | 256 Kbit (32,768 × 8) - provides sufficient nonvolatile storage for firmware boot code or configuration tables in embedded military systems |
| Read access time | 90 ns - enables direct replacement of SRAM in legacy 8-bit microprocessor buses without wait-state insertion |
| Page write time | 3 ms max - reduces firmware update latency vs. standard 10 ms variants, critical for field-programmable avionics subsystems |
| Endurance | 10,000 write cycles - validated under MIL-STD-883 test conditions for mission-critical reprogramming scenarios |
| Data retention | 10 years at +125°C - guaranteed retention under extended high-temperature storage or operation in engine-mounted electronics |
| Supply voltage | 5 V ±10% - compatible with legacy 5 V logic families and eliminates need for dedicated voltage regulators |
| Operating temperature | −55°C to +125°C - meets MIL-PRF-38535 Class B requirements for harsh-environment deployment |
Pinout & Package
AT28HC256F-90FM/883 is supplied in a 28-lead ceramic flatpack (MIL-STD-1835 F-12 Config B), hermetically sealed and screened per MIL-STD-883 Method 5005. Pin 1 is marked with a notch or dot; pins are numbered counterclockwise.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address inputs | 15-bit address bus supporting full 32,768-word addressing; A6–A14 define page boundaries for 64-byte page writes |
| I/O0–I/O7 | Bidirectional data bus | CMOS/TTL-compatible 8-bit data path; I/O7 used for DATA polling, I/O6 for toggle-bit end-of-write detection |
| CE | Chip Enable | Active-low device select; must be low with OE low and WE high for read access; initiates write when low with OE high and WE low |
| OE | Output Enable | Active-low output gate; controls data bus tristate; required high during write cycles to prevent bus contention |
| WE | Write Enable | Active-low write strobe; falling edge latches address and data; timing-critical for page write sequencing (tBLC ≤ 150 µs) |
| VCC | Power supply | +5 V ±10% supply; includes internal VCC sense circuitry that inhibits writes if voltage drops below 3.8 V |
| GND | Ground reference | Signal and power ground return; decoupling capacitor placement near pin minimizes noise during page write current spikes |
Key Features
| Feature | Design Value |
|---|---|
| Fast 3 ms page write | Reduces firmware update time by 70% vs. 10 ms variants-critical for time-constrained airborne reconfiguration |
| Hardware data protection | VCC sense + 5 ms power-on delay + noise filtering prevents spurious writes during brown-out or EMI events |
| Software data protection | Three-byte unlock sequence (AAh/55h/A0h) enables selective write-enable per memory region without hardware modification |
| JEDEC byte-wide pinout | Ensures drop-in compatibility with legacy 27C256/27C512 sockets and PCB layouts in existing military platforms |
| 64-byte page register | Allows burst loading of up to 64 bytes before internal programming begins-enables efficient block-level updates over slow host interfaces |
Applications
| Avionics Boot Memory | Weapon System Configuration Storage |
|---|---|
Use Scenario: Stores bootloader firmware and FPGA configuration bitstreams in radar processing units operating at −55°C to +125°C. IC Role / Device Role / Timing Role: Nonvolatile program memory interfaced directly to Z80 or 80C86 microprocessors via parallel bus; replaces battery-backed SRAM. Use Value: 90 ns access time eliminates wait states; 10-year data retention ensures mission readiness after long-term storage in unpowered munitions. | Use Scenario: Holds weapon calibration parameters, safety interlock settings, and flight profile tables in guided missile guidance computers. IC Role / Device Role / Timing Role: Secure configuration EEPROM with software data protection enabled to prevent unauthorized parameter changes during maintenance. Use Value: Hardware write inhibit during power transitions prevents corruption during launch vibration-induced supply glitches. |
| Tactical Radio Firmware Storage | Satellite Onboard Computer NVM |
Use Scenario: Stores cryptographic keys, frequency-hopping tables, and secure boot images in handheld SINCGARS radios deployed in desert environments. IC Role / Device Role / Timing Role: Field-upgradable firmware repository accessed via microcontroller's external memory interface; supports in-system programming via JTAG adapter. Use Value: 3 ms page write enables rapid over-the-air firmware patches; MIL-STD-883 screening ensures survivability under shock and thermal cycling. | Use Scenario: Retains telemetry calibration coefficients and fault history logs in LEO satellite onboard computers exposed to total ionizing dose (TID). IC Role / Device Role / Timing Role: Radiation-tolerant nonvolatile memory used for post-anomaly recovery data logging and mission-critical parameter backup. Use Value: Hermetic ceramic flatpack package mitigates moisture ingress and outgassing risks in vacuum; 10,000-cycle endurance supports frequent health-monitoring writes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28HC256-90JM/883 | Same 90 ns access and 3 ms page write, but in 32-lead CERDIP package with different pin 1 marking and thermal mass | Preferred for through-hole assembly or where higher thermal inertia improves write stability under transient load | Select when board layout requires DIP footprint or when JEDEC MO-090 compliance is mandated over flatpack |
| DS2502-E48+T&R | 1-Wire serial interface, 1 Kbit capacity, no parallel bus or page write; lower endurance (100K cycles) but integrated unique ID | Used in asset tracking or simple parameter storage where microcontroller GPIO scarcity prohibits parallel bus use | Choose only for low-pin-count designs needing minimal wiring; not a functional or pin-compatible substitute |
Compared with AT28HC256F-90FM/883, the AT28HC256-90JM/883 offers identical electrical performance in a different mechanical form factor, while DS2502-E48+T&R trades parallel speed and density for serial simplicity and unique identification-neither serves as a drop-in replacement.
Availability
AT28HC256F-90FM/883 is available at Aetrix Electronics and suitable for avionics control, weapon system configuration, tactical radio firmware, and satellite onboard computer applications requiring stable component supply across extended product lifecycles.
Supply support for AT28HC256F-90FM/883 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology is a U.S.-based semiconductor company specializing in microcontrollers, analog devices, and nonvolatile memory solutions for industrial, automotive, and aerospace markets.
The AT28HC256 product line delivers radiation-hardened, temperature-extended EEPROMs designed for mission-critical systems where data integrity, long-term reliability, and MIL-STD-883 qualification are mandatory.
FAQ
What does the "F" suffix in AT28HC256F-90FM/883 indicate?
The "F" in AT28HC256F-90FM/883 denotes the fast 3 ms page write variant, distinguishing it from the standard 10 ms version (e.g., AT28HC256-90JM/883). This faster write time is achieved through optimized internal timing and is confirmed in Microchip's DS20006352A datasheet Section 6.8. The AT28HC256F-90FM/883 maintains identical read timing, endurance, and temperature range as other AT28HC256 variants.
Is AT28HC256F-90FM/883 pin-compatible with standard AT28HC256-90 versions?
Yes, AT28HC256F-90FM/883 uses the JEDEC-approved byte-wide pinout defined in Table 2-1 of the datasheet and is functionally and physically pin-compatible with all AT28HC256 variants in the same package type (28-lead flatpack). Pin functions-including A0–A14, I/O0–I/O7, CE, OE, WE, VCC, and GND-are identical; only the internal page write timer differs.
Does AT28HC256F-90FM/883 support software data protection?
Yes, AT28HC256F-90FM/883 fully supports software data protection (SDP) using the three-byte unlock sequence (AAh → 55h → A0h) documented in Section 6.11 of the datasheet. SDP is disabled at shipment and can be enabled or disabled at any time. Once enabled, AT28HC256F-90FM/883 requires the unlock sequence before each write operation, providing robust protection against accidental firmware corruption.
What is the significance of the "/883" suffix in AT28HC256F-90FM/883?
The "/883" suffix indicates full compliance with MIL-STD-883, including screening for mechanical shock, thermal cycling, steady-state life testing, and burn-in. AT28HC256F-90FM/883 undergoes Group A, B, and C testing per MIL-PRF-38535, ensuring suitability for defense and space applications where reliability under extreme environmental stress is non-negotiable.
Can AT28HC256F-90FM/883 be used in place of AT28HC256-120JM/883?
No-AT28HC256F-90FM/883 and AT28HC256-120JM/883 differ in access speed (90 ns vs. 120 ns) and write performance (3 ms vs. 10 ms page write). While both share the same memory organization and MIL-STD-883 qualification, substituting the slower variant may violate timing budgets in systems designed around the 90 ns read and fast 3 ms write of AT28HC256F-90FM/883.
AT28HC256F-90FM/883 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-CFlatPack
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 3ms
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -55°C ~ 125°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-FlatPack, Ceramic Bottom-Brazed
AT28HC256F-90FM/883 FAQ
1.How can I place an order for AT28HC256F-90FM/883 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC256F-90FM/883 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC256F-90FM/883 reliable?
The price and inventory of AT28HC256F-90FM/883 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC256F-90FM/883 is usually 5 days.
3.What payment methods are accepted for AT28HC256F-90FM/883?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC256F-90FM/883 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC256F-90FM/883?
AT28HC256F-90FM/883 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC256F-90FM/883 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC256F-90FM/883?
For technical support, including AT28HC256F-90FM/883 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC256F-90FM/883 requirements.
6.How does Aetrix verify that AT28HC256F-90FM/883 is sourced from the original manufacturer or authorized distributors?
All AT28HC256F-90FM/883 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC256F-90FM/883 meets industry standards.
7.What is the process for return or replacement of AT28HC256F-90FM/883?
All AT28HC256F-90FM/883 units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC256F-90FM/883, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC256F-90FM/883 part is unused and in its original packaging.
Return procedure for AT28HC256F-90FM/883:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28HC256F-90FM/883 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

