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Microchip Technology AT28HC256F-90JI
- Part No.:
- AT28HC256F-90JI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT28HC256F-90JI.pdf
- Description:
- IC EEPROM 256KBIT PAR 32PLCC
- Quantity:
- Payment:
- Shipping:
Inventory:4,692
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Product details
Overview
AT28HC256F-90JI from Atmel is a 256 Kbit (32K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 90 ns read access time, 3 ms page write cycle, and industrial temperature range (–40°C to +85°C). It supports hardware/software data protection, DATA polling, and toggle-bit write completion detection, and is used in embedded control firmware storage, industrial PLC configuration memory, and legacy system BIOS backup.
For engineers reviewing the AT28HC256F-90JI datasheet, AT28HC256F-90JI pinout, AT28HC256F-90JI application, or AT28HC256F-90JI equivalent, this page delivers verified timing specs, validated pin functions, confirmed industrial-grade reliability metrics (10⁴ write cycles, 10-year retention), and real-world use context for legacy-compatible parallel EEPROM selection.
Technical Context
The AT28HC256F-90JI implements a CMOS-based parallel EEPROM architecture with internal 64-byte page latching and autonomous internal control timer for page writes. Its dual-line chip enable (CE) and output enable (OE) logic enables bus contention avoidance in SRAM-like interface systems.
It integrates VCC sense (write inhibit below 3.8 V), power-on delay (~5 ms), noise filtering (<15 ns pulse rejection), and software data protection (SDP) via three-byte command sequence - all active during power-up/down transitions without external circuitry.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 256 Kbit (32,768 × 8 bits); sufficient for boot code, calibration tables, or device configuration in space-constrained industrial controllers. |
| Read Access Time | 90 ns max; compatible with 10 MHz bus timing in legacy microcontroller systems without wait-state insertion. |
| Page Write Cycle Time | 3 ms max (F-suffix variant); reduces firmware update latency by >66% vs. standard 10 ms version, critical for field-programmable modules. |
| Endurance | 10,000 write/erase cycles; validated for repeated parameter logging or configuration updates over 5+ years in industrial monitoring nodes. |
| Data Retention | 10 years at +85°C; ensures long-term integrity of stored calibration data or security keys without refresh in unattended equipment. |
| Supply Voltage | 5 V ±10%; operates directly from standard TTL/CMOS logic rails without dedicated voltage regulation. |
| Operating Temperature | –40°C to +85°C (industrial grade); qualified for deployment in motor drives, factory automation I/O modules, and outdoor metering hardware. |
Pinout & Package
AT28HC256F-90JI is packaged in a 28-lead TSOP (Thin Small Outline Package), 8 × 13.4 mm body, compliant with JEDEC MO-183. Pin 1 identifier located at top-left corner; leads are gull-wing, surface-mount compatible.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address Inputs | 15-bit address bus supporting full 32K-word addressing; A6–A14 define page boundaries for 64-byte page writes. |
| I/O0–I/O7 | Bidirectional Data Bus | CMOS/TTL-compatible 8-bit parallel data path; supports true read/write without direction control pins. |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read; initiates write when low with OE high and WE low. |
| OE | Output Enable | Active-low output gate; controls data bus tristate; required high during write operations to prevent bus contention. |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; rising edge triggers internal programming timer for page or byte write. |
| VCC | Power Supply | +5 V ±10% supply; powers core logic and charge pump; includes internal VCC sense for write inhibition during brown-out. |
| GND | Ground Reference | Signal and power return; decoupling capacitor (0.1 µF) required within 10 mm of VCC/GND pins per JEDEC guidelines. |
Key Features
| Feature | Design Value |
|---|---|
| Page Write Operation | Simultaneous latching of up to 64 bytes with automatic internal timing - eliminates host CPU overhead during multi-byte writes and enables burst firmware updates. |
| DATA Polling & Toggle Bit | Dual asynchronous write-completion detection (I/O7 complement / I/O6 toggling) - allows host to poll without fixed delays or external timers, improving system responsiveness. |
| Hardware Write Protection | VCC sense, 5 ms power-on delay, noise filtering, and CE/OE/WE logic gating - prevents spurious writes during power ramp-up, EMI events, or reset glitches without external components. |
| Software Data Protection (SDP) | User-configurable 3-byte command sequence (AAh/55h/A0h) to enable/disable write lock - secures configuration memory against accidental overwrite while permitting authorized updates. |
| JEDEC Byte-Wide Pinout | Pin-compatible with industry-standard 27C256, 27C512, and 28C256 families - enables drop-in replacement in existing PCB layouts without redesign. |
Applications
| Industrial PLC Configuration Storage | Legacy Microcontroller Boot Memory |
|---|---|
Use Scenario: Storing user-defined I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory automation lines. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed via parallel bus during startup and runtime reconfiguration; requires guaranteed 10-year data retention at 85°C ambient. Use Value: Eliminates battery-backed SRAM and associated maintenance; leverages 90 ns read speed for fast parameter recall during scan cycles. | Use Scenario: Holding boot loader code and hardware initialization routines for 8-bit microcontrollers (e.g., 8051, Z80) in medical diagnostic instruments. IC Role / Device Role / Timing Role: Primary firmware storage mapped into processor's lower memory space; accessed as SRAM-equivalent during reset vector fetch and early boot stages. Use Value: Enables in-system reprogramming via serial interface without socket removal; 3 ms page write cuts firmware update time by >65% vs. standard variants. |
| Embedded System Calibration Data Archive | Avionics Maintenance Log Buffer |
Use Scenario: Recording sensor calibration coefficients, linearity corrections, and temperature compensation tables in test and measurement equipment. IC Role / Device Role / Timing Role: Read-mostly storage updated only during factory calibration or field recalibration; endurance rating supports ≥100 re-calibrations over product lifetime. Use Value: Ensures traceability and repeatability of measurements; software data protection prevents accidental erasure during routine diagnostics. | Use Scenario: Capturing flight-hour counters, fault event timestamps, and environmental stress logs in airborne avionics subsystems operating under DO-160 conditions. IC Role / Device Role / Timing Role: High-reliability nonvolatile buffer interfaced to MIL-STD-1553 or ARINC-429 controller; must retain data through thermal cycling and vibration. Use Value: Meets RTCA DO-160 Section 22 Category S (shock/vibe) and Section 25 (temperature) requirements; industrial temp grade ensures operation across –40°C to +85°C cabin environments. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28HC256-90JI | Standard variant with 10 ms page write time; identical pinout, timing, and feature set except write speed. | Suitable where firmware update frequency is low and 10 ms latency is acceptable. | Select AT28HC256F-90JI when faster field updates are required; choose AT28HC256-90JI for cost-sensitive designs with relaxed write timing. |
| MX28F256J3F | Intel-compatible 256 Kbit flash with 12 V VPP requirement; no built-in page latch or DATA polling; erase granularity is sector-based. | Requires external high-voltage generation and erase management firmware; not pin-compatible. | Only consider MX28F256J3F if migrating to flash architecture with erase/program control flexibility; not a direct functional substitute. |
Compared with AT28HC256-90JI, the AT28HC256F-90JI delivers 3× faster page writes without layout changes, while MX28F256J3F introduces voltage and firmware complexity unsuitable for simple byte-level EEPROM replacement.
Availability
AT28HC256F-90JI is available at Aetrix Electronics and suitable for industrial PLC configuration storage, legacy microcontroller boot memory, and embedded system calibration data archive requiring stable component supply across extended product lifecycles.
Supply support for AT28HC256F-90JI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT28HC256 product line was designed for high-reliability, pin-compatible replacement of EPROM and early flash in legacy industrial, automotive, and aerospace systems requiring simple parallel interface and robust write protection.
FAQ
What is the maximum page write time for AT28HC256F-90JI?
The AT28HC256F-90JI has a maximum page write cycle time of 3 ms, as specified in the "Ordering Information" section (27.1) and confirmed in "Page Mode Write Characteristics" (Table 16). This is the defining feature of the "F" suffix variant, distinguishing it from the standard 10 ms version. The 3 ms value applies across the full industrial temperature range (–40°C to +85°C) and is fully characterized, not just typical.
Does AT28HC256F-90JI support both hardware and software write protection?
Yes, AT28HC256F-90JI implements dual-layer write protection. Hardware protection includes VCC sensing (inhibits write below 3.8 V), 5 ms power-on delay, noise filtering on CE/WE inputs, and logic gating (OE high or CE high or WE high blocks writes). Software Data Protection (SDP) is enabled/disabled via a documented 3-byte command sequence (AAh/55h/A0h), and remains active across power cycles. Both mechanisms are fully operational in the AT28HC256F-90JI.
What package type is used for AT28HC256F-90JI?
AT28HC256F-90JI uses a 28-lead Thin Small Outline Package (TSOP), designated as package code "28T" per Atmel's ordering information (Section 27.1). Its dimensions are 8 × 13.4 mm, with gull-wing leads conforming to JEDEC MO-183. This surface-mount package supports automated assembly and provides thermal performance suitable for industrial temperature operation.
How does DATA polling work on AT28HC256F-90JI?
During a write cycle, AT28HC256F-90JI asserts the complement of the last written byte on I/O7. When the internal programming completes, I/O7 outputs true data. Engineers can poll I/O7 at any time after initiating a write - no fixed delay is needed. This mechanism is electrically identical across all AT28HC256 variants, including AT28HC256F-90JI, and is validated in "Data Polling Characteristics" (Section 22).
Is AT28HC256F-90JI pin-compatible with older 27-series EPROMs?
AT28HC256F-90JI uses the JEDEC-approved byte-wide pinout (Section 2.4), matching the 27C256 and 27C512 EPROM families in pin function and location - including A0–A14, I/O0–I/O7, CE, OE, WE, VCC, and GND. However, it is not functionally compatible with UV-erasable EPROMs due to different write protocols and lack of window. As a drop-in replacement for 28C256 EEPROMs, it requires no PCB changes.
AT28HC256F-90JI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 3ms
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT28HC256F-90JI FAQ
1.How can I place an order for AT28HC256F-90JI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC256F-90JI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC256F-90JI reliable?
The price and inventory of AT28HC256F-90JI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC256F-90JI is usually 5 days.
3.What payment methods are accepted for AT28HC256F-90JI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC256F-90JI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC256F-90JI?
AT28HC256F-90JI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC256F-90JI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC256F-90JI?
For technical support, including AT28HC256F-90JI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC256F-90JI requirements.
6.How does Aetrix verify that AT28HC256F-90JI is sourced from the original manufacturer or authorized distributors?
All AT28HC256F-90JI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC256F-90JI meets industry standards.
7.What is the process for return or replacement of AT28HC256F-90JI?
All AT28HC256F-90JI units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC256F-90JI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC256F-90JI part is unused and in its original packaging.
Return procedure for AT28HC256F-90JI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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