Microchip Technology AT28HC64B-70JU
- Part No.:
- AT28HC64B-70JU
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT28HC64B-70JU.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 32PLCC
- Quantity:
- Payment:

- Shipping:

Inventory:2,163
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Product details
Overview
AT28HC64B-70JU from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 70 ns read access time, hardware/software data protection, and page write capability supporting up to 64-byte writes in ≤10 ms. It operates on single 5 V ±10% supply and targets firmware storage, configuration memory, and calibration data retention in industrial control systems.
For engineers reviewing the AT28HC64B-70JU datasheet, AT28HC64B-70JU pinout, AT28HC64B-70JU application, or AT28HC64B-70JU equivalent, key selection criteria include verified 70 ns tACC timing, PLCC-32 package compatibility, CMOS/TTL I/O interface, DATA polling & toggle bit write completion detection, and software data protection enable/disable command sequences.
Technical Context
The AT28HC64B-70JU implements a parallel-access EEPROM architecture with internal 64-byte page latching, enabling simultaneous write of 1–64 bytes without external address/data bus hold. Its dual write detection mechanism-DATA polling on I/O7 and toggle bit on I/O6-eliminates need for fixed delay timing in host firmware.
Hardware protection includes VCC sense (<3.8 V inhibit), 5 ms power-on delay, noise filtering (<15 ns pulse rejection), and CE/OE/WE logic-level write inhibition. Software data protection uses a three-step hex command sequence (AAh/55h/A0h) written to specific addresses to enable/disable write lock state, persisting across power cycles.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8), organized as byte-addressable nonvolatile storage |
| Read Access Time | 70 ns maximum - enables direct replacement of SRAM in legacy 8-bit bus systems |
| Page Write Cycle | 10 ms maximum - supports burst programming of up to 64 bytes per internal cycle |
| VCC Supply | 5 V ±10% - compatible with standard TTL/CMOS logic rails without regulation |
| Standby Current | 100 µA CMOS - suitable for low-power battery-backed applications |
| Endurance | 100,000 write/erase cycles - validated for field-updatable configuration storage |
| Data Retention | 10 years at 85°C - meets industrial temperature lifecycle requirements |
Pinout & Package
AT28HC64B-70JU is packaged in a 32-lead Plastic J-Leaded Chip Carrier (PLCC), JEDEC MS-016 compliant, with 1.27 mm pitch, 13.4 mm × 13.4 mm body, and lead coplanarity ≤0.10 mm. Pin 1 identifier located at corner with beveled edge.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus selecting one of 8,192 byte locations; A6–A12 define page boundaries for write operations |
| I/O0–I/O7 | Bi-directional Data Bus | 8-bit parallel interface; I/O7 used for DATA polling, I/O6 for toggle bit write status |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read access |
| OE | Output Enable | Active-low output control; high during write cycles to prevent bus contention |
| WE | Write Enable | Active-low write strobe; falling edge latches address and data for byte or page write |
| VCC, GND | Power Supply | Single 5 V supply; decoupling required within 10 mm of pins for stable 70 ns operation |
| NC, DC | No Connect / Don't Connect | Pins 1 and 17 are unconnected; must remain floating per datasheet |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-wide Pinout | Direct drop-in replacement for industry-standard 28-pin EPROMs and SRAMs in existing PCB layouts |
| 64-byte Page Write | Reduces firmware update time by >90% vs. byte-by-byte writes; eliminates host-side address increment logic |
| DATA Polling & Toggle Bit | Enables deterministic write completion detection without fixed delays or external timers |
| Software Data Protection | Three-command hex sequence (AAh/55h/A0h) locks/unlocks entire array - prevents accidental overwrites during power transitions |
| 12 V Device ID Area | 64-byte dedicated sector accessible via A9 = 12 V; supports unique device serialization and traceability |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers operating continuously at 85°C. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed via 8-bit parallel bus; 70 ns read speed ensures real-time parameter retrieval during scan cycles. Use Value: 10-year data retention and 100,000-cycle endurance guarantee firmware integrity over full product lifecycle without backup batteries. | Use Scenario: Holding factory-calibrated sensor offsets and gain coefficients in portable diagnostic equipment with infrequent field updates. IC Role / Device Role / Timing Role: Secure calibration memory with software data protection enabled; 12 V device ID area stores serial number and calibration date. Use Value: Hardware + software write protection prevents corruption during brown-out conditions, meeting IEC 62304 safety requirements. |
| Automotive Body Control Module | Telecom Line Card Settings |
Use Scenario: Storing seat/mirror position presets, lighting profiles, and fault logs in automotive BCMs qualified to -40°C to +85°C. IC Role / Device Role / Timing Role: Industrial-temperature EEPROM interfaced to microcontroller's memory-mapped bus; page write reduces reprogramming time during dealer updates. Use Value: 100 µA standby current extends battery life during vehicle sleep mode; green Pb/halide-free PLCC package complies with ELV directive. | Use Scenario: Maintaining port-specific provisioning data (e.g., line impedance, codec settings) across hot-swap events in carrier-grade DSLAM line cards. IC Role / Device Role / Timing Role: Parallel EEPROM mapped into FPGA or ASIC address space; DATA polling allows precise synchronization with FPGA state machine. Use Value: 70 ns tACC enables sub-100 ns register read latency; JEDEC pinout simplifies migration from legacy 27C64 EPROMs. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28HC64B-70TU | Same die, SOIC-28 package; 70 ns timing; no PLCC mounting | Requires PCB redesign for gull-wing footprint; lower profile but no socket compatibility | Select when board space constraints preclude PLCC or socket-based field upgrades |
| ST M48T02-70MH6 | 64 Kbit parallel EEPROM with built-in lithium battery and RTC; 70 ns access; different pinout | Provides time-stamped logging; not pin-compatible; requires battery management circuitry | Select only when integrated real-time clock and timestamped event logging are mandatory |
Compared with AT28HC64B-70TU, the AT28HC64B-70JU offers socket-based field serviceability and thermal performance matching PLCC-reflow profiles; versus ST M48T02-70MH6, it delivers pure EEPROM functionality without RTC overhead, reducing BOM cost and layout complexity where timekeeping is handled externally.
Availability
AT28HC64B-70JU is available at Aetrix Electronics and suitable for industrial control systems, medical diagnostics equipment, and automotive body electronics requiring stable component supply, long-term obsolescence management, and green packaging compliance.
Supply support for AT28HC64B-70JU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT28HC64B product line delivers high-reliability parallel EEPROMs optimized for industrial and automotive applications requiring fast read access, robust write protection, and extended data retention without backup power.
FAQ
What is the maximum page write cycle time for the AT28HC64B-70JU?
The AT28HC64B-70JU has a maximum page write cycle time of 10 ms under standard operation. This value is confirmed in the AC Write Characteristics table (Section 16) of the official Atmel datasheet (0274L–PEEPR–2/3/09). The device supports faster 2 ms page writes only in the AT28HC64BF variant, which is not applicable to the AT28HC64B-70JU. Timing is internally controlled and does not require external clocking.
Does the AT28HC64B-70JU support both hardware and software data protection?
Yes, the AT28HC64B-70JU implements dual-layer data protection. Hardware protection includes VCC sensing (<3.8 V inhibit), 5 ms power-on delay, noise filtering on WE/CE inputs, and logic-level write inhibition. Software data protection is enabled/disabled via a documented three-step hex command sequence (AAh/55h/A0h) written to specific addresses. Both mechanisms are active simultaneously and are fully specified in Sections 4.6.1 and 4.6.2 of the AT28HC64B-70JU datasheet.
What package type is used for the AT28HC64B-70JU?
The AT28HC64B-70JU uses a 32-lead Plastic J-Leaded Chip Carrier (PLCC) package, designated "32J" in Atmel's ordering information (Section 27.1). It conforms to JEDEC MS-016, Variation AE, with 1.27 mm pitch and 13.4 mm × 13.4 mm body dimensions. Pins 1 and 17 are designated "Don't Connect" and must remain unconnected per the datasheet.
How is write completion detected on the AT28HC64B-70JU?
Write completion on the AT28HC64B-70JU is detected using two independent methods: DATA polling on I/O7 (complement of written data appears until completion) and toggle bit behavior on I/O6 (repeated reads cause I/O6 to alternate states until write finishes). Both methods are valid at any point during the write cycle and eliminate need for fixed delay timing. These functions are detailed in Sections 4.4 and 4.5 of the AT28HC64B-70JU datasheet.
Is the AT28HC64B-70JU compatible with 5 V TTL and CMOS logic levels?
Yes, the AT28HC64B-70JU features CMOS and TTL compatible inputs and outputs, as explicitly stated in the Features section and verified in DC Characteristics (Section 8). Input thresholds meet VIH ≥ 2.0 V and VIL ≤ 0.8 V; output drive meets VOL ≤ 0.4 V at 2.1 mA sink and VOH ≥ 2.4 V at 400 µA source. This ensures interoperability with legacy 5 V microcontrollers, FPGAs, and peripheral ICs without level-shifting circuitry.
AT28HC64B-70JU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 70 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT28HC64B-70JU FAQ
1.How can I place an order for AT28HC64B-70JU through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC64B-70JU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC64B-70JU reliable?
The price and inventory of AT28HC64B-70JU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC64B-70JU is usually 5 days.
3.What payment methods are accepted for AT28HC64B-70JU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC64B-70JU transactions.
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4.How is shipping managed for AT28HC64B-70JU?
AT28HC64B-70JU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC64B-70JU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC64B-70JU?
For technical support, including AT28HC64B-70JU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC64B-70JU requirements.
6.How does Aetrix verify that AT28HC64B-70JU is sourced from the original manufacturer or authorized distributors?
All AT28HC64B-70JU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC64B-70JU meets industry standards.
7.What is the process for return or replacement of AT28HC64B-70JU?
All AT28HC64B-70JU units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC64B-70JU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC64B-70JU part is unused and in its original packaging.
Return procedure for AT28HC64B-70JU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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