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Microchip Technology AT28HC64B-70PC

Part No.:
AT28HC64B-70PC
Manufacturer:
Microchip Technology
Category:
Memory
Package:
28-DIP (0.600", 15.24mm)
Datasheet:
AetrixAT28HC64B-70PC.pdf
Description:
IC EEPROM 64KBIT PARALLEL 28DIP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,190

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Product details

Overview

AT28HC64B-70PC from Microchip Technology (formerly Atmel) is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 70 ns read access time, 10 ms page write cycle, and CMOS/TTL-compatible I/O. It operates on single 5 V ±10% supply, supports hardware/software data protection, and targets nonvolatile storage in industrial control panels and legacy embedded systems requiring byte- or page-level reprogramming without external timing circuitry.

For engineers reviewing the AT28HC64B-70PC datasheet, AT28HC64B-70PC pinout, AT28HC64B-70PC application, or AT28HC64B-70PC equivalent, key selection criteria include verified 70 ns read timing, 64-byte page write capability, 100 µA standby current, hardware VCC-sense write inhibit, and JEDEC-compliant 28-pin PDIP package compatibility with legacy SRAM-based designs.

Technical Context

The AT28HC64B-70PC implements a static RAM-like interface with dual-line chip enable (CE) and output enable (OE) control to prevent bus contention, and uses internal address/data latching for autonomous 1–64-byte page writes. Its write cycle is self-timed using an internal control timer, eliminating need for external wait-state generation.

End-of-write detection is supported via DATA polling (I/O7 complement toggle) and Toggle Bit (I/O6 toggling), both operable at any point during the write cycle. Hardware protection includes VCC sense (<3.8 V inhibits write), 5 ms power-on delay, noise filtering (<15 ns pulses ignored), and CE/OE/WE logic gating - all active without software intervention.

Key Specifications

Parameter Value and Actual Design Meaning
Memory Size64 Kbit (8,192 × 8 bits); sufficient for firmware patch storage or configuration parameter tables in resource-constrained systems
Read Access Time70 ns maximum; enables direct replacement of 70 ns SRAM in existing memory-mapped interfaces without timing redesign
Page Write Cycle10 ms maximum (standard); allows burst programming of up to 64 bytes per command, reducing host CPU overhead vs. byte-by-byte writes
Supply Voltage5 V ±10%; compatible with legacy 5 V logic families and eliminates need for level-shifting in mixed-voltage systems
Standby Current100 µA typical (CMOS mode); supports low-power operation in battery-backed or energy-sensitive applications
Endurance100,000 write/erase cycles; validated for field-updatable calibration data or infrequently modified system logs
Data Retention10 years at 85°C; meets long-life requirements for industrial equipment deployed in uncontrolled thermal environments

Pinout & Package

AT28HC64B-70PC is packaged in a 28-lead plastic dual in-line package (PDIP), 0.600" wide (28P6), with JEDEC-standard byte-wide pinout and no internal connections on pins 1 and 17 (NC). Pin functions are electrically defined and mechanically fixed per datasheet Figure 2.1.

Pin/Terminal Circuit Role Design Meaning
A0–A12Address Inputs13-bit address bus supporting full 8K-word addressing; A0–A5 select byte within 64-byte page during page write
I/O0–I/O7Bidirectional Data BusCMOS/TTL-compatible 8-bit data path; high-impedance when CE or OE is inactive, enabling shared bus operation
CEChip EnableActive-low device select; must be low with OE low and WE high for read; write inhibited if held high
OEOutput EnableActive-low output gate; controls data bus drive; high-Z state prevents bus contention during write or standby
WEWrite EnableActive-low write strobe; falling edge latches address and data; initiates byte or page write sequence
GND / VCCPower TerminalsSingle 5 V supply with dedicated ground; decoupling required per JEDEC layout guidelines for stable 70 ns operation

Key Features

Feature Design Value
JEDEC Byte-Wide PinoutDirect drop-in replacement for industry-standard 28-pin parallel memory sockets, minimizing PCB redesign effort
64-Byte Page WriteReduces host processor write latency by up to 64× versus sequential byte writes, critical for real-time configuration updates
Hardware Write InhibitVCC sense + 5 ms power-on delay ensures zero inadvertent writes during power ramp-up, eliminating need for external reset sequencing
Software Data Protection (SDP)User-configurable 3-byte unlock sequence prevents accidental overwrites while allowing selective reprogramming of protected blocks
DATA Polling & Toggle BitDual, asynchronous end-of-write detection methods eliminate need for fixed delay timers or interrupt-driven polling loops

Applications

Industrial PLC Configuration Storage Legacy Medical Device Calibration Tables

Use Scenario: Storing user-modifiable I/O mapping and alarm thresholds in programmable logic controllers operating in factory-floor environments with wide temperature swings.

IC Role / Device Role / Timing Role: Nonvolatile configuration register bank accessed via parallel bus; 70 ns read timing aligns with 14 MHz microcontroller bus cycles.

Use Value: Enables field updates without firmware reflashing; 100,000-cycle endurance supports decades of recalibration events; 10-year data retention ensures integrity across maintenance intervals.

Use Scenario: Holding sensor calibration coefficients and safety-critical operational limits in FDA-cleared diagnostic instruments where data corruption is unacceptable.

IC Role / Device Role / Timing Role: Secure parameter vault with hardware write inhibit active during power transitions; SDP prevents unauthorized modification of regulatory-approved values.

Use Value: Dual protection (VCC sense + SDP) satisfies IEC 62304 software safety requirements; 100 µA standby current extends battery backup runtime during AC loss.

Automotive Body Control Module NVRAM Point-of-Sale Terminal Transaction Logs

Use Scenario: Recording door lock actuation history and lighting configuration preferences in automotive BCMs exposed to -40°C to +85°C ambient conditions.

IC Role / Device Role / Timing Role: Industrial-temperature EEPROM interfaced to 8-bit MCU via parallel bus; 70 ns access supports deterministic CAN message logging latency.

Use Value: Guaranteed operation across full automotive temperature range; page write reduces log entry time to <10 ms, preventing CAN frame loss during high-traffic periods.

Use Scenario: Archiving signed transaction receipts and audit trails in retail terminals where power failure must not corrupt financial records.

IC Role / Device Role / Timing Role: Atomic write-capable NVRAM with DATA polling confirmation; CE/OE/WE control ensures atomicity even during brownout events.

Use Value: End-of-write detection guarantees receipt persistence before host acknowledges transaction; 10-year retention meets PCI-DSS archival mandates without periodic refresh.

Equivalent & Alternatives

The following parts are listed as comparable options for similar parallel EEPROM applications.

Alternative Part Technical Difference Application Difference Selection Advice
AT28C64B-70PCSame pinout, identical 64K × 8 organization, but lacks software data protection and page write; 100,000-cycle endurance unchangedSuitable only where write protection and burst programming are unnecessary; lower cost for simple configuration storageSelect AT28C64B-70PC only if SDP and page write features are unused - AT28HC64B-70PC provides superior field reliability and reduced firmware complexity
ST M28W640ECB70N664 Mbit (8M × 8) capacity, 70 ns access, but requires 3.3 V supply and has different pinout; no hardware VCC-sense write inhibitTargets modern 3.3 V systems with higher density needs; incompatible with 5 V buses or legacy sockets without level shiftersChoose ST M28W640ECB70N6 only for new 3.3 V designs requiring >64 Kbit; AT28HC64B-70PC remains optimal for 5 V, socket-compatible, and safety-critical use cases

Compared with AT28C64B-70PC, AT28HC64B-70PC adds essential data integrity features without pinout or timing penalty; versus ST M28W640ECB70N6, it delivers proven 5 V interoperability and hardware-level write safety critical for legacy industrial deployments.

Availability

AT28HC64B-70PC is available at Aetrix Electronics and suitable for industrial control panels, medical device calibration storage, and automotive body control modules requiring stable component supply, long-term lifecycle support, and guaranteed pinout compatibility with legacy designs.

Supply support for AT28HC64B-70PC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and manufacturing continuity for the AT28HC64B family. The company specializes in microcontrollers, analog, and memory solutions for industrial, automotive, and consumer markets.

The AT28HC64B product line was designed specifically for robust, pin-compatible replacement of aging EPROM and SRAM-based nonvolatile storage in legacy 5 V embedded systems - emphasizing reliability, ease of integration, and long-term manufacturability.

FAQ

What is the maximum read access time specified for the AT28HC64B-70PC?

The AT28HC64B-70PC is characterized for a maximum read access time of 70 ns under commercial temperature conditions (0°C to 70°C) and 5 V ±10% supply. This value is guaranteed across the full operating voltage and temperature range specified for the -70 speed grade, and is measured from address valid to valid output data with CE and OE asserted low and WE high.

Does the AT28HC64B-70PC support page write operations, and what is the maximum page size?

Yes, the AT28HC64B-70PC supports page write operations with a maximum page size of 64 bytes. During a page write, addresses A6–A12 define the target page, while A0–A5 select individual bytes within that page. Up to 64 bytes may be loaded sequentially within 150 µs intervals before the internal write timer triggers, enabling efficient bulk programming without host-side timing constraints.

How does hardware write protection function on the AT28HC64B-70PC?

Hardware write protection on the AT28HC64B-70PC operates through four independent mechanisms: (1) VCC sense disables writes below ~3.8 V; (2) a 5 ms internal power-on delay prevents writes until supply stabilizes; (3) write inhibition occurs if CE is high, OE is low, or WE is high; and (4) input noise filtering rejects pulses shorter than 15 ns on CE or WE. These operate autonomously without software configuration.

Can the AT28HC64B-70PC be used in industrial temperature applications?

No - the AT28HC64B-70PC variant is rated for commercial temperature range only (0°C to 70°C). For industrial applications (-40°C to +85°C), the correct part is AT28HC64B-70PI (PDIP), AT28HC64B-70SI (SOIC), or AT28HC64B-70TI (TSOP). The "-PC" suffix explicitly denotes plastic DIP packaging with commercial temperature grading.

What package type is used for the AT28HC64B-70PC?

The AT28HC64B-70PC uses a 28-lead plastic dual in-line package (PDIP), 0.600" wide (package code 28P6), with JEDEC-standard pinout. Pins 1 and 17 are designated as no-connect (NC) and must remain unconnected in PCB layout. This package is lead-free compliant and RoHS certified per Atmel's green packaging option documentation.

AT28HC64B-70PC Specifications

Product attributes
Attribute value
Manufacturer:
Microchip Technology
Series:
-
Package/Case:
28-DIP (0.600", 15.24mm)
Packaging:
Tube
Product Status:
Obsolete
Programmable:
Not Verified
Memory Type:
Non-Volatile
Memory Format:
EEPROM
Technology:
EEPROM
Memory Size:
64Kbit
Memory Organization:
8K x 8
Memory Interface:
Parallel
Clock Frequency:
-
Write Cycle Time - Word, Page:
10ms
Access Time:
70 ns
Voltage - Supply:
4.5V ~ 5.5V
Operating Temperature:
0°C ~ 70°C (TC)
Grade:
-
Qualification:
-
Mounting Type:
Through Hole
Supplier Device Package:
28-PDIP

AT28HC64B-70PC FAQ

1.How can I place an order for AT28HC64B-70PC through Aetrix?

Please submit a Request for Quotation (RFQ) for AT28HC64B-70PC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AT28HC64B-70PC reliable?

The price and inventory of AT28HC64B-70PC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC64B-70PC is usually 5 days.

3.What payment methods are accepted for AT28HC64B-70PC?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC64B-70PC transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for AT28HC64B-70PC?

AT28HC64B-70PC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AT28HC64B-70PC order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AT28HC64B-70PC?

For technical support, including AT28HC64B-70PC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC64B-70PC requirements.

6.How does Aetrix verify that AT28HC64B-70PC is sourced from the original manufacturer or authorized distributors?

All AT28HC64B-70PC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC64B-70PC meets industry standards.

7.What is the process for return or replacement of AT28HC64B-70PC?

All AT28HC64B-70PC units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC64B-70PC, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AT28HC64B-70PC part is unused and in its original packaging.

Return procedure for AT28HC64B-70PC:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

AT28HC64B-70PC Tags

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