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Microchip Technology AT28HC64B-90PI

Part No.:
AT28HC64B-90PI
Manufacturer:
Microchip Technology
Category:
Memory
Package:
28-DIP (0.600", 15.24mm)
Datasheet:
AetrixAT28HC64B-90PI.pdf
Description:
IC EEPROM 64KBIT PARALLEL 28DIP
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,272

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Product details

Overview

AT28HC64B-90PI from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 90 ns read access time, hardware/software data protection, and page write capability (1–64 bytes). It operates from a single 5 V ±10% supply, supports industrial temperature range (−40°C to +85°C), and delivers 40 mA active current with 100 µA CMOS standby current - used in embedded system configuration storage, firmware parameter retention, and boot code nonvolatile storage.

For engineers reviewing the AT28HC64B-90PI datasheet, AT28HC64B-90PI pinout, AT28HC64B-90PI application, or AT28HC64B-90PI equivalent, key selection criteria include verified 90 ns tACC timing, PDIP-28 package compatibility, page-write cycle time (≤10 ms), DATA polling/toggle bit write completion detection, and software data protection enable/disable command sequences.

Technical Context

The AT28HC64B-90PI implements a static RAM-compatible parallel interface with dual-line chip enable (CE) and output enable (OE) control for bus contention avoidance. Its internal 64-byte page register latches addresses and data during page writes, freeing the address/data bus for concurrent operations.

Write completion is confirmed via I/O7 DATA polling (complement-to-data behavior) or I/O6 toggle-bit detection, both operable at any point during the write cycle. Hardware protection includes VCC sense (<3.8 V inhibit), 5 ms power-on delay, noise filtering on WE/CE, and write-inhibit logic (OE low, CE high, or WE high).

Key Specifications

Parameter Value and Actual Design Meaning
Memory Size 64 Kbit (8,192 × 8), organized as byte-addressable parallel array
Read Access Time (tACC) 90 ns maximum - guarantees deterministic read latency in timing-critical control loops
Page Write Cycle Time (tWC) 10 ms maximum - enables burst programming of up to 64 bytes without external timing control
VCC Supply 5 V ±10% - compatible with legacy 5 V TTL/CMOS logic families and avoids level-shifting
Operating Temperature −40°C to +85°C - qualified for industrial-grade embedded systems including motor controllers and PLCs
Endurance & Retention 100,000 write/erase cycles; 10-year data retention - suitable for field-updatable calibration tables
Standby Current (ISB1) 100 µA CMOS - enables low-power sleep modes in battery-backed applications

Pinout & Package

AT28HC64B-90PI is supplied in a 28-lead plastic dual inline package (PDIP), 0.600" wide, with JEDEC-standard byte-wide pinout and no-connect (NC) pins at positions 1 and 14. Pin functions are electrically identical across PDIP, SOIC, TSOP, and PLCC variants.

Pin/Terminal Circuit Role Design Meaning
A0–A12 Address Inputs 13-bit address bus selecting one of 8,192 memory locations; A6–A12 define page boundaries for 64-byte page writes
I/O0–I/O7 Bidirectional Data Bus 8-bit parallel data path for reads/writes; I/O7 used for DATA polling, I/O6 for toggle-bit detection
CE Chip Enable Active-low global device select; must be low for read/write; high forces outputs to high-Z and inhibits writes
OE Output Enable Active-low read control; when low and CE low, data appears on I/O lines; high disables outputs
WE Write Enable Active-low write strobe; falling edge latches address/data; rising edge initiates internal write timer
GND / VCC Power Terminals Ground reference and 5 V supply; decoupling capacitor required within 1 cm of VCC/GND pins
NC No Connect Pins 1 and 14 are unconnected; must remain floating - no pull-up/down or routing allowed

Key Features

Feature Design Value
Page Write Operation Simultaneous latching of up to 64 bytes with automatic internal programming - reduces host CPU overhead vs. byte-by-byte writes
DATA Polling & Toggle Bit Dual asynchronous write-completion detection methods (I/O7 complement, I/O6 toggling) - eliminates need for fixed delays or external timers
Software Data Protection (SDP) User-configurable 3-byte command sequence (AAh/55h/A0h) to enable/disable write lock - prevents corruption during power transients
Hardware Write Inhibit VCC sense, 5 ms power-on delay, and noise filtering on WE/CE - ensures robustness against brown-out and EMI-induced glitches
Device Identification Area 64-byte reserved EEPROM region (1FC0h–1FFFh) accessible via 12 V on A9 - supports unique device serialization and traceability

Applications

Industrial PLC Configuration Storage Automotive Engine Control Module (ECM) Calibration Tables

Use Scenario: Storing runtime-modifiable I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers.

IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed via parallel bus during system initialization and runtime updates.

Use Value: 90 ns read access enables real-time parameter fetch within PLC scan cycles; 100,000-cycle endurance supports decades of field recalibration.

Use Scenario: Holding fuel injection timing offsets, sensor compensation coefficients, and emission control lookup tables subject to dealer reprogramming.

IC Role / Device Role / Timing Role: Field-updatable calibration memory interfaced directly to microcontroller's external bus interface.

Use Value: Software data protection prevents accidental overwrites during ignition transients; 10-year data retention meets automotive lifecycle requirements.

Medical Infusion Pump Firmware Parameters Networking Equipment Bootloader Settings

Use Scenario: Retaining dose rate limits, alarm thresholds, and user preferences across power cycles in Class II medical devices.

IC Role / Device Role / Timing Role: Safety-critical configuration store accessed during power-up self-test and runtime safety checks.

Use Value: Hardware write inhibit blocks writes below 3.8 V - prevents corruption during brown-out conditions common in battery-backed operation.

Use Scenario: Storing MAC address, boot priority, DHCP settings, and firmware version flags in managed switches and routers.

IC Role / Device Role / Timing Role: System-level configuration EEPROM mapped into microprocessor's memory space for fast boot-time reads.

Use Value: JEDEC-standard pinout ensures drop-in replacement in legacy designs; 5 V tolerance simplifies integration with older ASICs/FPGAs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar parallel EEPROM applications.

Alternative Part Technical Difference Application Difference Selection Advice
AT28HC64B-90JI Same die, 32-lead PLCC package; identical AC/DC specs and timing Surface-mount assembly; requires reflow profile compatible with J-leads Select for automated SMT production where board space and thermal mass favor PLCC over through-hole PDIP
AT28HC64B-90SI Same die, 28-lead SOIC package; same 90 ns speed grade and industrial temp range Smaller footprint than PDIP; gull-wing leads simplify optical inspection Choose for space-constrained industrial controls where SOIC fits existing PCB land patterns

Compared with AT28HC64B-90PI, the AT28HC64B-90JI offers surface-mount reliability and higher I/O density, while AT28HC64B-90SI provides reduced board area and improved manufacturability - all three share identical electrical behavior, page-write algorithms, and software data protection implementation.

Availability

AT28HC64B-90PI is available at Aetrix Electronics and suitable for industrial PLC configuration storage, automotive ECM calibration tables, and medical infusion pump firmware parameters requiring stable component supply, long-term obsolescence management, and full traceability.

Supply support for AT28HC64B-90PI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.

The AT28HC64B product line was designed for high-reliability, field-updatable nonvolatile storage in industrial and automotive systems - emphasizing robust write protection, extended endurance, and direct SRAM-style interface simplicity.

FAQ

What is the maximum page write cycle time for AT28HC64B-90PI?

The AT28HC64B-90PI has a maximum page write cycle time (tWC) of 10 ms under standard operation. This value is guaranteed across the full industrial temperature range (−40°C to +85°C) and applies to all page sizes (1–64 bytes). The device automatically manages internal programming timing once the page write is initiated - no external timing circuitry is required. AT28HC64B-90PI does not support the optional 2 ms tWC variant (which requires the AT28HC64BF die).

How does software data protection work on AT28HC64B-90PI?

AT28HC64B-90PI implements software data protection (SDP) via a three-byte unlock sequence: write AAh to address 1555h, 55h to 0AAAh, then A0h to 1555h. After this sequence, all subsequent writes require repeating the same sequence before data. SDP remains active across power cycles and protects against inadvertent writes during power-up/down. The AT28HC64B-90PI ships with SDP disabled by default.

Can AT28HC64B-90PI be used with 3.3 V systems?

No - AT28HC64B-90PI requires a single 5 V ±10% supply (4.5 V to 5.5 V) and is not 3.3 V tolerant. Its inputs are CMOS/TTL compatible but designed for 5 V logic levels; applying 3.3 V to VCC will prevent proper operation and may cause undefined behavior. For 3.3 V systems, consider Microchip's 25-series SPI EEPROMs or other 3.3 V parallel alternatives - AT28HC64B-90PI is strictly a 5 V device.

What package type is used for AT28HC64B-90PI?

AT28HC64B-90PI uses a 28-lead plastic dual inline package (PDIP), 0.600" wide (package code P6), with through-hole mounting. Pin 1 is located at the top-left corner with a notch or dot marking. This package conforms to JEDEC MS-011 AB and features NC pins at positions 1 and 14. Thermal and mechanical specifications are fully documented in Atmel's 28P6 packaging drawing.

Does AT28HC64B-90PI support chip erase functionality?

Yes - AT28HC64B-90PI supports chip erase using a high-voltage (12.0 V ±0.5 V) pulse applied to the A9 pin while holding CE low and WE low, with OE at VH. The erase cycle requires a minimum 10 ms pulse width and places the device in high-impedance state during execution. Chip erase clears all 8,192 bytes to FFh and is distinct from byte/page write operations. This function is documented in Section 18 of the AT28HC64B datasheet.

AT28HC64B-90PI Specifications

Product attributes
Attribute value
Manufacturer:
Microchip Technology
Series:
-
Package/Case:
28-DIP (0.600", 15.24mm)
Packaging:
Tube
Product Status:
Obsolete
Programmable:
Not Verified
Memory Type:
Non-Volatile
Memory Format:
EEPROM
Technology:
EEPROM
Memory Size:
64Kbit
Memory Organization:
8K x 8
Memory Interface:
Parallel
Clock Frequency:
-
Write Cycle Time - Word, Page:
10ms
Access Time:
90 ns
Voltage - Supply:
4.5V ~ 5.5V
Operating Temperature:
-40°C ~ 85°C (TC)
Grade:
-
Qualification:
-
Mounting Type:
Through Hole
Supplier Device Package:
28-PDIP

AT28HC64B-90PI FAQ

1.How can I place an order for AT28HC64B-90PI through Aetrix?

Please submit a Request for Quotation (RFQ) for AT28HC64B-90PI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AT28HC64B-90PI reliable?

The price and inventory of AT28HC64B-90PI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC64B-90PI is usually 5 days.

3.What payment methods are accepted for AT28HC64B-90PI?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC64B-90PI transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for AT28HC64B-90PI?

AT28HC64B-90PI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AT28HC64B-90PI order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AT28HC64B-90PI?

For technical support, including AT28HC64B-90PI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC64B-90PI requirements.

6.How does Aetrix verify that AT28HC64B-90PI is sourced from the original manufacturer or authorized distributors?

All AT28HC64B-90PI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC64B-90PI meets industry standards.

7.What is the process for return or replacement of AT28HC64B-90PI?

All AT28HC64B-90PI units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC64B-90PI, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AT28HC64B-90PI part is unused and in its original packaging.

Return procedure for AT28HC64B-90PI:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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