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Microchip Technology AT28HC64BF-12SU-T
- Part No.:
- AT28HC64BF-12SU-T
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28HC64BF-12SU-T.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:944
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Product details
Overview
AT28HC64BF-12SU-T from Microchip Technology (formerly Atmel) is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 70 ns read access time, 2 ms maximum page write cycle, and software/hardware data protection. It operates on single 5 V ±10% supply, supports industrial temperature range (–40°C to +85°C), and is used in firmware storage, configuration memory, and calibration data retention in embedded controllers and industrial PLCs.
For engineers reviewing the AT28HC64BF-12SU-T datasheet, AT28HC64BF-12SU-T pinout, AT28HC64BF-12SU-T application, or AT28HC64BF-12SU-T equivalent, key selection considerations include page-write capability (1–64 bytes), DATA polling and toggle-bit write completion detection, CMOS/TTL compatibility, hardware write inhibit logic, and green (Pb/halide-free) SOIC-28 packaging.
Technical Context
The AT28HC64BF-12SU-T implements a static RAM-compatible interface with dual-line chip enable (CE) and output enable (OE) control, enabling bus contention avoidance in multi-device systems. Its internal 64-byte page register latches address and data during write cycles, freeing the bus for concurrent operations.
Write completion is verified via I/O7 DATA polling (complement-to-data behavior) or I/O6 toggle-bit detection-both functional without external timing components. Hardware protection includes VCC sense (<3.8 V inhibition), 5 ms power-on delay, noise filtering (<15 ns pulse rejection), and CE/OE/WE state-based write inhibit.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8 bits); sufficient for boot code, device ID, or sensor calibration tables |
| Read Access Time | 70 ns maximum; enables direct replacement of SRAM in legacy 8-bit microcontroller systems |
| Page Write Cycle | 2 ms maximum; allows burst programming of up to 64 bytes without host CPU wait-state overhead |
| Supply Voltage | 5 V ±10%; compatible with standard TTL/CMOS logic rails without level-shifting |
| Active Current | 40 mA typical at 5 MHz; supports high-speed read/write in power-constrained industrial modules |
| Standby Current | 100 µA CMOS mode; enables low-power retention in battery-backed systems |
| Data Retention | 10 years minimum; validated under industrial temperature cycling per JEDEC JESD22-A117 |
| Endurance | 100,000 write/erase cycles; suitable for field-updatable firmware with infrequent reprogramming |
Pinout & Package
AT28HC64BF-12SU-T is packaged in a 28-lead, 0.300" wide plastic gull-wing small outline (SOIC-28), JEDEC MS-013 compliant, Pb/halide-free. Pin 1 identifier located at top-left corner; NC pins are not internally connected and must remain unconnected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus; A0–A5 select byte within 64-byte page, A6–A12 define page boundary |
| CE | Chip Enable | Active-low chip select; when high, device enters high-impedance standby with 100 µA current draw |
| OE | Output Enable | Active-low output gate; controls data bus drive; used with CE for bus contention management |
| WE | Write Enable | Active-low write strobe; falling edge latches address; rising edge latches data for byte/page write |
| I/O0–I/O7 | Bidirectional Data Bus | CMOS/TTL-compatible 8-bit data path; I/O7 used for DATA polling, I/O6 for toggle-bit detection |
| GND | Ground Reference | Signal and power ground; requires low-impedance connection to minimize noise during write verification |
| VCC | Power Supply | 5 V ±10% input; internal VCC sense circuit disables writes below 3.8 V to prevent corruption |
| NC | No Connect | Pins 1 and 28 are unconnected; must be left floating or tied to GND per PCB layout best practice |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-Wide Pinout | Direct drop-in replacement for industry-standard 28-pin parallel EEPROMs and SRAMs in existing PCB layouts |
| Software Data Protection (SDP) | User-configurable 3-byte command sequence (AAh/55h/A0h) enables/disables write protection without hardware changes |
| 64-Byte Page Register | Reduces host processor overhead by allowing sequential loading of up to 64 bytes before internal auto-programming begins |
| DATA Polling & Toggle Bit | Dual asynchronous write-complete detection methods eliminate need for fixed delay timers or external status lines |
| Industrial Temperature Range | Guaranteed operation from –40°C to +85°C; qualified per AEC-Q100 stress test conditions for extended reliability |
| Green Packaging | Pb/halide-free SOIC-28 meets RoHS Directive 2011/65/EU and JEDEC J-STD-020 moisture sensitivity level 3 |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Memory |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed during power-up and runtime parameter updates via parallel bus interface. Use Value: 100,000-cycle endurance ensures reliable field updates over 10+ years; 70 ns read speed supports real-time scan cycle execution without latency penalty. |
Use Scenario: Retaining sensor calibration coefficients, device serial numbers, and regulatory compliance flags in portable diagnostic equipment. IC Role / Device Role / Timing Role: Secure, tamper-resistant data vault using hardware write inhibit and SDP to prevent accidental overwrite during firmware upgrades. Use Value: 10-year data retention and VCC-sense protection guarantee integrity across battery swaps and power brownouts in clinical settings. |
| Telecom Base Station Boot Code | Automotive ECU Parameter Tables |
Use Scenario: Holding bootloader images and FPGA configuration bitstreams in outdoor telecom infrastructure operating at extended temperature extremes. IC Role / Device Role / Timing Role: Parallel EEPROM acting as primary boot source for microprocessors; accessed during cold start before DRAM initialization. Use Value: 2 ms page write enables fast field updates of critical firmware; JEDEC pinout ensures compatibility with legacy board designs. |
Use Scenario: Storing adaptive learning values (e.g., fuel trim, idle air control) and vehicle-specific configuration in engine control units. IC Role / Device Role / Timing Role: High-reliability nonvolatile memory interfaced directly to MCU's external memory bus for low-latency parameter reads/writes. Use Value: Hardware write protection prevents corruption during ignition transients; 5 V tolerance aligns with automotive 5 V supply domains. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST M28W640ECT | 64 Mbit capacity, 120 ns access, 3.3 V core with 5 V I/O tolerance; no software data protection | Targeted at high-density firmware storage where page size and write speed are secondary to capacity | Select when >64 Kbit memory is required and system uses mixed-voltage signaling |
| ON Semiconductor CAT28C64B | Same 64 Kbit density and SOIC-28 package; 150 ns access, no page write, no SDP, 5 V only | Suitable for cost-sensitive legacy systems where write speed and advanced protection are not required | Choose for simple, low-cost replacement where 70 ns timing and page write are unnecessary |
Compared with ST M28W640ECT and CAT28C64B, the AT28HC64BF-12SU-T delivers superior write efficiency (2 ms page vs. byte-only), robust dual-mode data protection, and faster read performance-making it optimal for systems requiring frequent, secure, low-overhead configuration updates.
Availability
AT28HC64BF-12SU-T is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics equipment, and telecom base stations requiring stable component supply, long-term lifecycle support, and RoHS-compliant green packaging.
Supply support for AT28HC64BF-12SU-T includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, qualification, and manufacturing continuity for the AT28HC64BF family.
The AT28HC64BF series was designed as a drop-in parallel EEPROM replacement for legacy SRAM and EPROM sockets in industrial and communications equipment, emphasizing reliability, ease of integration, and long-term data integrity.
FAQ
What is the maximum page write size supported by the AT28HC64BF-12SU-T?
The AT28HC64BF-12SU-T supports page write operations of 1 to 64 bytes per internal programming cycle. All bytes must reside on the same 64-byte page, defined by address bits A6–A12. The device latches addresses and data internally, enabling the host to release the bus after initial setup-reducing CPU overhead compared to byte-by-byte writes. This capability is confirmed in Section 4.3 of the official datasheet.
Does the AT28HC64BF-12SU-T require external high-voltage programming circuitry?
No, the AT28HC64BF-12SU-T performs all write and erase operations using only the standard 5 V ±10% supply-no external 12 V programming voltage is needed for normal page or byte writes. A 12 V pulse on A9 is required only for accessing the optional 64-byte device identification area (addresses 1FC0H–1FFFH), not for main array programming. This simplifies system design and eliminates HV charge pumps.
How does hardware write protection work on the AT28HC64BF-12SU-T?
Hardware protection on the AT28HC64BF-12SU-T includes four mechanisms: (1) VCC sense disabling writes below 3.8 V, (2) automatic 5 ms power-on delay before write enable, (3) real-time inhibition if CE is high, OE is low, or WE is high, and (4) noise filtering rejecting pulses <15 ns on CE/WE. These features prevent corruption during power-up, brownout, or EMI events-verified in Sections 4.6.1 and 7 of the datasheet.
Can the AT28HC64BF-12SU-T be used as a direct replacement for SRAM in existing designs?
Yes-the AT28HC64BF-12SU-T uses a static RAM-compatible interface: identical read timing, same JEDEC byte-wide pinout, and CMOS/TTL-compatible I/O levels. During reads, it behaves identically to SRAM; during writes, it requires no external components beyond those already present for SRAM bus control. However, write cycles take 2 ms (page) or ~10 ms (byte), so timing-critical write paths must accommodate this latency.
What is the purpose of the extra 64 bytes of EEPROM in the AT28HC64BF-12SU-T?
The AT28HC64BF-12SU-T includes an additional 64 bytes of EEPROM (addresses 1FC0H–1FFFH) accessible only when A9 is raised to 12.0 V ±0.5 V. This area is intended for permanent device identification, manufacturing traceability, or secure key storage-separate from the main 64 Kbit array. It supports the same read/write protocols but requires elevated voltage, preventing accidental access during normal operation.
AT28HC64BF-12SU-T Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Programmable:
- Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 120 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28HC64BF-12SU-T FAQ
1.How can I place an order for AT28HC64BF-12SU-T through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC64BF-12SU-T on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC64BF-12SU-T reliable?
The price and inventory of AT28HC64BF-12SU-T are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC64BF-12SU-T is usually 5 days.
3.What payment methods are accepted for AT28HC64BF-12SU-T?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC64BF-12SU-T transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC64BF-12SU-T?
AT28HC64BF-12SU-T orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC64BF-12SU-T order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC64BF-12SU-T?
For technical support, including AT28HC64BF-12SU-T datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC64BF-12SU-T requirements.
6.How does Aetrix verify that AT28HC64BF-12SU-T is sourced from the original manufacturer or authorized distributors?
All AT28HC64BF-12SU-T products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC64BF-12SU-T meets industry standards.
7.What is the process for return or replacement of AT28HC64BF-12SU-T?
All AT28HC64BF-12SU-T units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC64BF-12SU-T, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC64BF-12SU-T part is unused and in its original packaging.
Return procedure for AT28HC64BF-12SU-T:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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