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Microchip Technology AT28HC64BF-70SU
- Part No.:
- AT28HC64BF-70SU
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-SOIC (0.295", 7.50mm Width)
- Datasheet:
-
AT28HC64BF-70SU.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28SOIC
- Quantity:
- Payment:
- Shipping:
Inventory:3,303
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Product details
Overview
AT28HC64BF-70SU from Atmel (now Microchip Technology) is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 70 ns read access time, single 5 V ±10% supply, and industrial temperature range (−40°C to +85°C). It supports automatic 1–64-byte page writes, hardware/software data protection, and DATA polling/toggle bit for write completion detection - used in embedded control systems requiring nonvolatile parameter storage with fast random access and field-upgradable firmware configuration.
For engineers reviewing the AT28HC64BF-70SU datasheet, AT28HC64BF-70SU pinout, AT28HC64BF-70SU application, or AT28HC64BF-70SU equivalent, key selection criteria include verified 70 ns read timing, CMOS/TTL-compatible I/O, 2 ms max page write cycle, 100 µA standby current, and software data protection enable/disable command sequence compatibility.
Technical Context
The AT28HC64BF-70SU operates as a drop-in SRAM-compatible nonvolatile memory: reads require CE and OE low with WE high; writes initiate on WE or CE low pulse while OE is high. Its internal 64-byte page register latches address and data during page write, freeing the bus for concurrent operations.
Write completion is confirmed via I/O7 DATA polling (complement-to-data then true data) or I/O6 toggle bit behavior. Hardware protection includes VCC sense (<3.8 V inhibit), 5 ms power-on delay, noise filtering (<15 ns pulses rejected), and CE/OE/WE logic-level write inhibition.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8), organized as byte-addressable parallel EEPROM |
| Read Access Time | 70 ns maximum - enables direct replacement of SRAM in legacy 5 MHz bus systems without timing redesign |
| Page Write Cycle | 2 ms maximum - allows up to 64 bytes written per internal programming cycle, reducing host CPU overhead vs. byte-by-byte writes |
| Supply Voltage | 5 V ±10% - compatible with standard TTL/CMOS logic rails; no auxiliary voltage required |
| Standby Current | 100 µA typical - supports low-power modes in battery-backed or energy-constrained industrial controllers |
| Data Retention | 10 years minimum - ensures long-term reliability in unattended equipment like metering or remote sensors |
| Endurance | 100,000 write/erase cycles - sufficient for frequent calibration or logging applications over product lifetime |
Pinout & Package
AT28HC64BF-70SU is supplied in a 28-lead SOIC (Small Outline Integrated Circuit) package, 0.300" wide body, JEDEC MS-013 compliant, with gull-wing leads and RoHS-compliant green (Pb/halide-free) finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus (0–8191) selecting one of 8K byte locations; A6–A12 define page boundaries for 64-byte page writes |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel interface; carries data during read (output) or write (input); supports DATA polling on I/O7 and toggle bit on I/O6 |
| CE | Chip Enable | Active-low chip select; must be low for read/write access; high state forces outputs to high-impedance and inhibits writes |
| OE | Output Enable | Active-low output control; low with CE low enables data output; high disables outputs (high-Z) and permits write initiation |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; used with CE for flexible bus arbitration and write timing control |
| GND / VCC | Power Terminals | Ground reference and 5 V supply; decoupling capacitor placement near VCC/GND pins critical for stable 70 ns read timing |
| NC | No Connect | Unbonded pins (positions 1, 17 in SOIC top view); must remain unconnected per datasheet to avoid functional risk |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-wide Pinout | Direct replacement for industry-standard 28-pin parallel EEPROMs and SRAMs - eliminates PCB redesign in legacy systems |
| Software Data Protection (SDP) | User-configurable write lock via 3-byte command sequence (AAh/55h/A0h); remains active across power cycles and prevents accidental writes without re-authentication |
| Hardware Write Inhibit | VCC sense, 5 ms power-on delay, and noise filtering ensure immunity to brown-out, reset glitches, and EMI-induced spurious writes |
| 64-byte Page Register | Reduces host processor burden: up to 64 bytes loaded sequentially within 150 µs window, then written internally without further bus activity |
| Device Identification Area | 64 extra bytes (1FC0h–1FFFh) accessible via 12 V on A9 - enables unique serialization, calibration data storage, or firmware version tracking |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing user-defined I/O mapping, scaling factors, and alarm thresholds in programmable logic controllers deployed in factory automation. IC Role / Device Role / Timing Role: Nonvolatile parameter memory accessed during boot and runtime; 70 ns read speed ensures real-time response to sensor inputs without interrupt latency. Use Value: Eliminates need for battery-backed SRAM; 100,000-cycle endurance supports daily recalibration; SDP prevents field technician overwrite errors. |
Use Scenario: Retaining patient-specific calibration coefficients and device serial history in portable diagnostic instruments with infrequent firmware updates. IC Role / Device Role / Timing Role: Secure, low-power configuration store; 100 µA standby current extends battery life between clinical sessions; 12 V A9 access enables secure device ID registration. Use Value: Meets IEC 62304 data integrity requirements; hardware+software protection satisfies FDA traceability mandates for medical firmware revision control. |
| Automotive Body Control Module (BCM) | Telecom Line Card Settings |
Use Scenario: Saving seat/mirror position presets, lighting profiles, and door lock configurations in automotive BCMs operating across −40°C to +85°C ambient. IC Role / Device Role / Timing Role: Industrial-temp EEPROM interfaced directly to microcontroller's parallel bus; 5 V supply matches vehicle electrical system nominal rail. Use Value: 10-year data retention guarantees settings persist over vehicle lifetime; page write reduces CAN bus load during multi-parameter updates. |
Use Scenario: Holding line impedance compensation values, gain trim settings, and protocol handshake parameters in carrier-grade DSLAM line cards. IC Role / Device Role / Timing Role: Field-upgradable configuration store accessed during card initialization; JEDEC pinout ensures compatibility with existing board layouts. Use Value: 2 ms page write enables rapid provisioning of new service profiles; toggle bit detection simplifies host driver implementation vs. fixed-delay polling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST M28W640ECT-70N6 | 64 Mbit (8M × 8), 70 ns, 3.3 V core with 5 V tolerant I/O; requires level-shifting for pure 5 V systems | Higher density for future-proofing; not pin-compatible due to different pin count (48-pin TSOP) and voltage domain | Select when migrating to 3.3 V architecture or needing >64 Kbit capacity; verify VCC and pinout compatibility before substitution. |
| Microchip 28C64B-25J | 64 Kbit, 250 ns access, 5 V only, PDIP package; lacks page write, software protection, and toggle bit | Legacy drop-in for cost-sensitive designs where speed and advanced features are non-critical | Choose only for backward compatibility in legacy repair scenarios; cannot support AT28HC64BF-70SU's 70 ns timing or page write efficiency. |
Compared with ST M28W640ECT-70N6 and Microchip 28C64B-25J, the AT28HC64BF-70SU uniquely delivers 70 ns read performance, 2 ms page write, and dual hardware/software write protection in a JEDEC-standard 28-pin SOIC - making it optimal for industrial upgrades requiring minimal layout change and guaranteed write safety.
Availability
AT28HC64BF-70SU is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics equipment, automotive body control modules, and telecom line cards requiring stable component supply, long-lifecycle support, and green packaging compliance.
Supply support for AT28HC64BF-70SU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation, acquired by Microchip Technology in 2016, is a semiconductor innovator known for high-reliability nonvolatile memory and microcontroller solutions targeting industrial, automotive, and communications markets.
The AT28HC64BF series was designed as a high-speed, software-protected parallel EEPROM for legacy system upgrades - bridging the gap between volatile SRAM performance and EEPROM persistence in resource-constrained embedded controllers.
FAQ
What is the maximum page write size supported by the AT28HC64BF-70SU?
The AT28HC64BF-70SU supports page writes of 1 to 64 bytes per internal programming cycle. All bytes must reside on the same page, defined by address bits A6–A12. Each subsequent byte must be loaded within 150 µs of the prior one; exceeding this interval triggers immediate internal write execution. This capability is confirmed in Section 4.3 of the official datasheet and enables efficient bulk configuration updates without host-side timing overhead.
Does the AT28HC64BF-70SU require a 12 V supply for normal operation?
No, the AT28HC64BF-70SU operates exclusively from a single 5 V ±10% supply during standard read/write operations. The 12 V requirement applies only to accessing the optional 64-byte device identification area (addresses 1FC0h–1FFFh) by raising A9 to 12.0 V ±0.5 V - a separate, infrequent function not needed for primary memory operation. All other functions, including software data protection enable/disable, use only 5 V.
How does the software data protection (SDP) feature work on the AT28HC64BF-70SU?
The AT28HC64BF-70SU implements SDP via a three-step write command sequence (AAh to 1555h, 55h to 0AAAh, A0h to 1555h) that locks the entire memory array against inadvertent writes. Once enabled, SDP persists through power cycles. To write protected data, the same sequence must precede each write operation. This mechanism is detailed in Section 4.6.2 and Figure 19 of the datasheet and provides robust field-programmability control without hardware modification.
Can the AT28HC64BF-70SU be used as a direct replacement for standard SRAM in existing designs?
Yes - the AT28HC64BF-70SU uses JEDEC-approved byte-wide pinout and behaves electrically like SRAM during reads (CE/OE low, WE high), enabling drop-in replacement in many 5 V systems. However, write cycles require explicit WE/CE timing control and end-detection (via DATA polling or toggle bit), unlike SRAM's instantaneous writes. Designers must adapt host firmware to manage write completion, but no PCB changes are needed for pin-compatible layouts.
What is the purpose of the NC (No Connect) pins on the AT28HC64BF-70SU SOIC package?
The NC pins on the AT28HC64BF-70SU (positions 1 and 17 in the 28-lead SOIC top view) are physically present but internally unbonded. They must remain unconnected in the circuit per Section 2.1 of the datasheet. Connecting them risks undefined behavior or damage, as they lack internal circuitry and are not referenced in any timing, electrical, or functional specification for the AT28HC64BF-70SU.
AT28HC64BF-70SU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-SOIC (0.295", 7.50mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 70 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-SOIC
AT28HC64BF-70SU FAQ
1.How can I place an order for AT28HC64BF-70SU through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC64BF-70SU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC64BF-70SU reliable?
The price and inventory of AT28HC64BF-70SU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC64BF-70SU is usually 5 days.
3.What payment methods are accepted for AT28HC64BF-70SU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC64BF-70SU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC64BF-70SU?
AT28HC64BF-70SU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC64BF-70SU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC64BF-70SU?
For technical support, including AT28HC64BF-70SU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC64BF-70SU requirements.
6.How does Aetrix verify that AT28HC64BF-70SU is sourced from the original manufacturer or authorized distributors?
All AT28HC64BF-70SU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC64BF-70SU meets industry standards.
7.What is the process for return or replacement of AT28HC64BF-70SU?
All AT28HC64BF-70SU units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC64BF-70SU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC64BF-70SU part is unused and in its original packaging.
Return procedure for AT28HC64BF-70SU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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