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Microchip Technology AT28HC64BF-90PU
- Part No.:
- AT28HC64BF-90PU
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-DIP (0.600", 15.24mm)
- Datasheet:
-
AT28HC64BF-90PU.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28DIP
- Quantity:
- Payment:
- Shipping:
Inventory:4,404
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Product details
Overview
AT28HC64BF-90PU from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 90 ns read access time, 2 ms maximum page write cycle, and industrial temperature range (−40°C to +85°C). It operates from a single 5 V ±10% supply, supports hardware/software data protection, and is used in embedded systems requiring nonvolatile parameter storage with fast page writes.
For engineers reviewing the AT28HC64BF-90PU datasheet, AT28HC64BF-90PU pinout, AT28HC64BF-90PU application, or AT28HC64BF-90PU equivalent, key selection criteria include its 64-byte internal page register, DATA polling and toggle bit for write completion detection, CMOS/TTL compatibility, and green (Pb/halide-free) 28-lead PDIP package.
Technical Context
The AT28HC64BF-90PU functions as a static RAM-compatible nonvolatile memory: reads require CE and OE low with WE high; writes initiate on falling CE or WE edge with OE high. Its internal 64-byte page register latches addresses and up to 64 bytes of data, freeing the bus during internal programming.
Write completion is verified via I/O7 DATA polling (complement-to-true transition) or I/O6 toggle bit behavior. Hardware protection includes VCC sense (<3.8 V inhibit), 5 ms power-on delay, and noise filtering on CE/WE; software protection uses a three-byte command sequence at addresses 1555H/0AAAH/1555H.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 words × 8 bits); sufficient for firmware configuration tables or calibration data in microcontroller-based systems. |
| Read Access Time | 90 ns maximum; enables direct interfacing with 10 MHz–12 MHz microcontrollers without wait states. |
| Page Write Cycle | 2 ms maximum; allows burst programming of up to 64 bytes per cycle, reducing host CPU overhead vs. byte-by-byte writes. |
| Supply Voltage | 5 V ±10%; compatible with legacy 5 V logic families and eliminates need for level-shifting circuitry. |
| Active Current | 40 mA typical; supports high-speed operation while remaining within standard 5 V rail budgets. |
| Standby Current | 100 µA CMOS; enables low-power retention in battery-backed or energy-sensitive applications. |
| Endurance | 100,000 write/erase cycles; ensures long-term reliability in field-updatable systems like industrial controllers. |
| Data Retention | 10 years minimum; guarantees persistent storage of critical settings across product lifecycle without refresh. |
Pinout & Package
AT28HC64BF-90PU is packaged in a 28-lead plastic dual in-line package (PDIP), 0.600" wide, with JEDEC-standard byte-wide pinout and green (Pb/halide-free) finish.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; A6–A12 define page boundaries for 64-byte page writes. |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read access; inhibits writes when high. |
| OE | Output Enable | Active-low output control; places I/O pins in high-impedance state when high to prevent bus contention. |
| WE | Write Enable | Active-low write strobe; initiates byte or page write on falling edge; combined with CE for dual-control write safety. |
| I/O0–I/O7 | Bi-directional Data Bus | 8-bit parallel data path; carries input data during writes and output data during reads; supports DATA polling on I/O7 and toggle bit on I/O6. |
| GND / VCC | Power Terminals | Ground and 5 V supply pins; decoupling capacitor placement near VCC/GND is required for stable 90 ns timing compliance. |
| NC | No Connect | Pin 1 and Pin 28 are no-connect; must remain unconnected per datasheet to avoid functional interference. |
Key Features
| Feature | Design Value |
|---|---|
| 64-byte Page Register | Enables single-cycle programming of up to 64 contiguous bytes, reducing host processor intervention and improving system-level write throughput. |
| DATA Polling (I/O7) | Allows real-time detection of write completion by monitoring complement-to-true transition on I/O7, eliminating fixed delays in host firmware. |
| Toggle Bit (I/O6) | Provides asynchronous write status feedback via toggling I/O6 during programming, enabling interrupt-driven or polled status checking. |
| Software Data Protection | Three-byte command sequence (AAH→55H→A0H) enables user-configurable write lock; remains active through power cycles and requires re-entry to write protected memory. |
| Hardware Write Inhibit | VCC sense, 5 ms power-on delay, and 15 ns noise filtering on CE/WE prevent spurious writes during power ramp or EMI events. |
| Device Identification Area | 64-byte reserved EEPROM block (1FC0H–1FFFH) accessible at 12 V on A9, usable for unique device serialization or firmware version tracking. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping, scaling factors, and alarm thresholds in programmable logic controllers deployed in factory automation environments. IC Role / Device Role / Timing Role: Nonvolatile parameter memory interfaced directly to an 8-bit microcontroller bus; accessed via CE/OE/WE handshaking with 90 ns read timing. Use Value: Ensures configuration persistence across power loss and supports field updates via page writes without disrupting controller runtime operation. | Use Scenario: Retaining sensor calibration coefficients and usage logs in portable diagnostic equipment requiring FDA-compliant data integrity. IC Role / Device Role / Timing Role: Secure configuration store with software data protection enabled; accessed during boot and maintenance mode using DATA polling for reliable write verification. Use Value: Prevents accidental overwrites during hot-plug events or brownout conditions, meeting IEC 62304 requirements for medical device memory safety. |
| Automotive Body Control Module | Telecom Line Card Settings |
Use Scenario: Holding seat/mirror position presets, lighting profiles, and fault history in automotive body control units operating across −40°C to +85°C. IC Role / Device Role / Timing Role: Industrial-grade EEPROM providing 10-year data retention and 100,000-cycle endurance under thermal cycling stress. Use Value: Eliminates need for external backup batteries or supercapacitors while maintaining compliance with AEC-Q100 temperature and reliability requirements. | Use Scenario: Storing port-specific provisioning parameters, firmware patch flags, and SNMP agent configurations in carrier-grade DSLAM line cards. IC Role / Device Role / Timing Role: Parallel interface EEPROM integrated into FPGA or ASIC memory-mapped space; leverages 2 ms page writes to minimize configuration latency during card reset. Use Value: Enables rapid re-provisioning of line cards in central office environments where downtime must be sub-second during failover events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST M28W640ECT-90N6T | 64 Mbit (8M × 8) Flash memory with 90 ns access; requires sector erase before write; no built-in page register. | Used where code storage dominates over frequent small-data updates; not drop-in due to erase-before-write requirement. | Select only if migrating from EEPROM to Flash for larger firmware storage; requires host firmware rewrite for erase management. |
| Microchip 25LC640-I/P | 64 Kbit SPI EEPROM; serial interface; 5 ms max write cycle; 1 MHz SPI clock; no parallel bus or page register. | Suitable for space-constrained designs with existing SPI infrastructure; lacks JEDEC pinout and 90 ns read performance. | Choose for board area reduction and simplified routing; accept slower write speed and loss of true parallel bus compatibility. |
Compared with ST M28W640ECT-90N6T and Microchip 25LC640-I/P, the AT28HC64BF-90PU uniquely delivers parallel-byte access, 64-byte page writes, and hardware/software write protection in a JEDEC-standard PDIP package-making it optimal for legacy 8-bit systems requiring deterministic, low-overhead nonvolatile storage.
Availability
AT28HC64BF-90PU is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics, automotive body control modules, and telecom line cards requiring stable component supply and long-term obsolescence support.
Supply support for AT28HC64BF-90PU includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT28HC64BF product line was designed for high-reliability, parallel-interface EEPROM applications in industrial and automotive systems requiring fast read/write, robust data protection, and extended data retention.
FAQ
What is the maximum page write size supported by the AT28HC64BF-90PU?
The AT28HC64BF-90PU supports a maximum page write size of 64 bytes. This is enabled by its internal 64-byte page register, which latches address and data for simultaneous programming. All bytes in a page write must reside on the same page defined by A6–A12, and successive bytes must be loaded within 150 µs (tBLC) to maintain page mode operation. The AT28HC64BF-90PU does not support larger page sizes or partial-page writes outside this constraint.
How does the AT28HC64BF-90PU indicate write completion?
The AT28HC64BF-90PU provides two independent methods: DATA polling on I/O7 (complement-to-true transition) and toggle bit behavior on I/O6 (repeated toggling until write ends). Both methods are valid at any point during the write cycle and do not require fixed timing delays. The AT28HC64BF-90PU's toggle bit is activated by toggling either OE or CE, and its DATA polling response is guaranteed per AC characteristics table on page 6 of the datasheet.
Is the AT28HC64BF-90PU compatible with 3.3 V systems?
No, the AT28HC64BF-90PU requires a single 5 V ±10% supply (4.5 V to 5.5 V) and is not 3.3 V tolerant. Its inputs are CMOS/TTL compatible but specified only for 5 V operation; applying 3.3 V to VCC will result in undefined behavior and failure to meet AC timing specs including the 90 ns read access. For 3.3 V systems, consider Microchip's 25LC640-I/P or similar SPI EEPROMs instead of the AT28HC64BF-90PU.
What package type is used for the AT28HC64BF-90PU?
The AT28HC64BF-90PU uses a 28-lead plastic dual in-line package (PDIP), 0.600" wide, designated as 28P6 in Atmel's ordering guide. It features a green (Pb/halide-free) finish and JEDEC-standard pinout. Pin 1 is marked by a notch or dot; pins 1 and 28 are no-connect (NC) and must remain unconnected in PCB layout to ensure proper functionality of the AT28HC64BF-90PU.
Can the AT28HC64BF-90PU be used without external pull-up resistors on I/O lines?
Yes-the AT28HC64BF-90PU has internally weak pull-downs on I/O lines but no internal pull-ups. However, external pull-up resistors are recommended on I/O0–I/O7 when interfacing with open-drain or high-impedance hosts to ensure clean logic levels during read operations and prevent floating bus states. The AT28HC64BF-90PU's output drivers are designed for TTL/CMOS loads, and omission of pull-ups may cause metastability or increased EMI susceptibility in noisy industrial environments.
AT28HC64BF-90PU Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-DIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 28-PDIP
AT28HC64BF-90PU FAQ
1.How can I place an order for AT28HC64BF-90PU through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28HC64BF-90PU on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28HC64BF-90PU reliable?
The price and inventory of AT28HC64BF-90PU are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28HC64BF-90PU is usually 5 days.
3.What payment methods are accepted for AT28HC64BF-90PU?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28HC64BF-90PU transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28HC64BF-90PU?
AT28HC64BF-90PU orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28HC64BF-90PU order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28HC64BF-90PU?
For technical support, including AT28HC64BF-90PU datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28HC64BF-90PU requirements.
6.How does Aetrix verify that AT28HC64BF-90PU is sourced from the original manufacturer or authorized distributors?
All AT28HC64BF-90PU products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28HC64BF-90PU meets industry standards.
7.What is the process for return or replacement of AT28HC64BF-90PU?
All AT28HC64BF-90PU units undergo pre-shipment inspection (PSI). If there is an issue with AT28HC64BF-90PU, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28HC64BF-90PU part is unused and in its original packaging.
Return procedure for AT28HC64BF-90PU:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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