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Microchip Technology AT28LV010-25TC
- Part No.:
- AT28LV010-25TC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-TFSOP (0.724", 18.40mm Width)
- Datasheet:
-
AT28LV010-25TC.pdf
- Description:
- IC EEPROM 1MBIT PARALLEL 32TSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,956
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Product details
Overview
AT28LV010-25TC from Atmel is a 1-Mbit (128K × 8) single-supply 3.3V parallel EEPROM with JEDEC-standard byte-wide pinout, 250 ns read access time, and 10 ms maximum page write cycle time. It supports 1–128-byte page writes with internal latching and DATA polling for write completion detection, and operates across commercial temperature range (0°C to 70°C) in a 32-lead TSOP package. Used in firmware storage and configuration retention for industrial control modules.
For engineers reviewing the AT28LV010-25TC datasheet, AT28LV010-25TC pinout, AT28LV010-25TC application, or AT28LV010-25TC equivalent, key selection criteria include its 3.3V-only operation, hardware/software data protection, CMOS standby current of 20 µA, and compatibility with SRAM-like interface timing in embedded boot memory systems.
Technical Context
The AT28LV010-25TC implements a paged parallel EEPROM architecture with an internal 128-byte page register that latches address and data on falling WE or CE edges, enabling bus release during internal programming. Its software data protection (SDP) requires a three-byte command sequence before every write, and it uses DATA polling on I/O7 or toggle-bit detection on I/O6 to signal write completion.
Hardware protection includes VCC power-on delay (~5 ms), noise filtering (<15 ns pulse rejection on WE/CE), and write inhibition via OE low, CE high, or WE high states. The device features built-in error correction for extended endurance (100,000 write cycles) and 10-year data retention, and includes 128 bytes of dedicated EEPROM for device identification.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 1 Mbit (131,072 × 8), organized as 128K words × 8 bits - supports full firmware image storage for small microcontrollers. |
| Read Access Time | 250 ns max - enables direct replacement of fast SRAM in nonvolatile boot code applications without wait-state insertion. |
| Page Write Cycle Time | 10 ms max - allows rapid field-upgradable parameter sets without system-level timeout constraints. |
| Supply Voltage | 3.3 V ± 10% - compatible with modern low-voltage logic families and eliminates need for dual-voltage rails. |
| Standby Current | 20 µA CMOS - reduces power budget in battery-backed or energy-sensitive embedded systems. |
| Endurance | 100,000 write cycles - sufficient for decades of daily configuration updates in industrial HMI or sensor calibration logging. |
| Data Retention | 10 years at 25°C - ensures long-term reliability in unattended equipment without refresh mechanisms. |
Pinout & Package
AT28LV010-25TC is packaged in a 32-lead Plastic Thin Small Outline Package (TSOP), Type I, 8 mm × 20 mm footprint, compliant with JEDEC MO-142 Variation BD. Pin 1 identifier is marked by a beveled corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A16 | Address Inputs | 17-bit address bus supporting full 128K-word addressing; A7–A16 define page boundaries for 128-byte writes. |
| I/O0–I/O7 | Bidirectional Data Bus | Byte-wide parallel interface; I/O7 used for DATA polling, I/O6 for toggle-bit status indication during writes. |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read; controls latching edge for address/data during write. |
| OE | Output Enable | Active-low output control; high-Z state prevents bus contention when disabled; required high during write operations. |
| WE | Write Enable | Active-low write strobe; falling edge latches address; rising edge latches data; initiates SDP command sequence validation. |
| VCC | Power Supply | 3.3 V ± 10% supply input; internal power-on delay (~5 ms) prevents spurious writes during power ramp. |
| GND | Ground Reference | Signal and power ground reference; decoupling capacitor placement near this pin critical for noise immunity. |
| NC | No Connect | Unbonded pins (e.g., TSOP pins 1, 16, 32); must remain unconnected per design - no pull-up/down or routing allowed. |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-Wide Pinout | Direct drop-in replacement for industry-standard parallel EPROMs and EEPROMs in existing PCB layouts. |
| Software Data Protection (SDP) | Three-byte command sequence required before every write - prevents accidental overwrites during power transitions or noise events. |
| DATA Polling & Toggle Bit | Dual asynchronous write-completion detection methods (I/O7 complement / I/O6 toggling) eliminate need for fixed delays or external timers. |
| 128-Byte Page Register | Internal latching frees address/data bus after initial load - enables background processing while write executes internally. |
| Green (Pb/Halide-Free) Option | RoHS-compliant TSOP packaging available - meets environmental compliance requirements for industrial and automotive deployments. |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data Retention |
|---|---|
Use Scenario: Storing user-defined I/O mapping, scaling factors, and alarm thresholds in programmable logic controllers deployed in factory automation. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed at power-up and during runtime reconfiguration; reads occur at 5 MHz bus speed with 250 ns tACC. Use Value: Enables field-upgradable settings without firmware reflashing; 20 µA standby current extends uptime in battery-buffered backup scenarios. |
Use Scenario: Holding calibrated sensor offsets and gain coefficients for ECG front-end modules requiring traceable, tamper-resistant parameter storage. IC Role / Device Role / Timing Role: Secure, write-protected parameter vault; SDP prevents unauthorized modification; DATA polling ensures deterministic write completion before next measurement cycle. Use Value: Meets IEC 62304 Class C software safety requirements via hardware-enforced write lockout and 100,000-cycle endurance for lifetime recalibration. |
| Automotive Body Control Module Boot Code | Networking Equipment Firmware Patch Storage |
Use Scenario: Storing bootloader code and CAN message routing tables in body control units operating across -40°C to 125°C (via automotive-grade variants). IC Role / Device Role / Timing Role: Parallel boot memory mapped into MCU address space; 250 ns read access avoids wait states during cold-start initialization. Use Value: Supports AEC-Q100 Grade 2 qualification (when ordered as -25TA); 10-year data retention ensures integrity over vehicle lifetime without refresh. |
Use Scenario: Storing hot-swappable firmware patches for Ethernet switch management processors requiring zero-downtime updates. IC Role / Device Role / Timing Role: Dual-bank emulation using page-write capability - one bank active while other receives 128-byte patch blocks via I²C-to-parallel bridge. Use Value: 10 ms page write time enables sub-100ms patch commits; hardware write inhibit (OE high) guarantees atomicity during power loss events. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| Microchip 28C010-25/P | 5 V supply only; 250 ns access; PDIP/PLCC only; no SDP - relies on external hardware write protect. | Lacks 3.3 V compatibility and software protection; unsuitable for mixed-voltage or noise-prone environments. | Select only if legacy 5 V system exists and board layout cannot accommodate voltage translation or enhanced protection. |
| ON Semiconductor CAT28C010ZD25 | 3.3 V supply; 250 ns access; TSOP-32; includes SDP but no toggle-bit detection; 50,000-cycle endurance. | Lower endurance and single-status method limit use in high-write-frequency calibration logging. | Acceptable for cost-sensitive consumer applications where 100K-cycle endurance and dual-status reporting are not required. |
Compared with Microchip 28C010-25/P and ON Semiconductor CAT28C010ZD25, the AT28LV010-25TC delivers superior system robustness via mandatory SDP, dual-status write confirmation, and higher endurance - making it preferred for industrial and automotive designs where data integrity is non-negotiable.
Availability
AT28LV010-25TC is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, automotive body electronics, and networking equipment requiring stable component supply, long-lifecycle support, and RoHS-compliant packaging.
Supply support for AT28LV010-25TC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and security ICs, with design centers across the US, Europe, and Asia.
The AT28LV010 belongs to Atmel's low-voltage parallel EEPROM product line, engineered for direct SRAM-interface compatibility in embedded systems requiring reliable, field-upgradable nonvolatile storage without external support circuitry.
FAQ
What is the maximum page write size supported by the AT28LV010-25TC?
The AT28LV010-25TC supports up to 128 bytes per page write operation. This is enabled by its internal 128-byte page register, which latches address and data on the falling edge of WE or CE. All bytes written in a single page operation must reside within the same 128-byte boundary defined by address bits A7–A16. The AT28LV010-25TC does not support partial-page writes outside this constraint.
Does the AT28LV010-25TC require external high-voltage programming circuitry?
No, the AT28LV010-25TC operates from a single 3.3 V ± 10% supply and performs all internal programming functions without external high-voltage sources. Its advanced CMOS process integrates charge pumps and control logic to generate necessary programming voltages internally. The AT28LV010-25TC eliminates the need for +12 V or +21 V rails traditionally required by older EEPROM families.
How does software data protection (SDP) work on the AT28LV010-25TC?
Software data protection on the AT28LV010-25TC requires a precise three-byte command sequence (0xAA to address 0x5555, 0x55 to address 0x2AAA, then 0xA0 to address 0x5555) before any write operation. The AT28LV010-25TC validates this sequence in real time; failure to issue it results in no data being written, though internal timers still run. SDP is always enabled - there is no disable mode.
Can the AT28LV010-25TC be used as a direct replacement for a 27C010 EPROM?
The AT28LV010-25TC shares JEDEC-standard byte-wide pinout with the 27C010, but is not a direct functional replacement due to differences in write methodology and voltage requirements. While read operations are identical, the AT28LV010-25TC requires SDP commands and operates at 3.3 V only, whereas the 27C010 needs 12.5 V for programming. Board-level changes to voltage regulation and write control logic are required for migration to AT28LV010-25TC.
What is the purpose of the DC pin on the AT28LV010-25TC PLCC variant?
The DC pin (Don't Connect) appears only on the 32-lead PLCC package variant (e.g., AT28LV010-25JC) and is an unconnected, unbonded terminal. It serves no electrical function and must remain floating - no pull-up, pull-down, or PCB trace connection is permitted. The AT28LV010-25TC TSOP variant (e.g., AT28LV010-25TC) does not include a DC pin; its pinout omits this terminal entirely.
AT28LV010-25TC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-TFSOP (0.724", 18.40mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 250 ns
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-TSOP
AT28LV010-25TC FAQ
1.How can I place an order for AT28LV010-25TC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28LV010-25TC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28LV010-25TC reliable?
The price and inventory of AT28LV010-25TC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28LV010-25TC is usually 5 days.
3.What payment methods are accepted for AT28LV010-25TC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28LV010-25TC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28LV010-25TC?
AT28LV010-25TC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28LV010-25TC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28LV010-25TC?
For technical support, including AT28LV010-25TC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28LV010-25TC requirements.
6.How does Aetrix verify that AT28LV010-25TC is sourced from the original manufacturer or authorized distributors?
All AT28LV010-25TC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28LV010-25TC meets industry standards.
7.What is the process for return or replacement of AT28LV010-25TC?
All AT28LV010-25TC units undergo pre-shipment inspection (PSI). If there is an issue with AT28LV010-25TC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28LV010-25TC part is unused and in its original packaging.
Return procedure for AT28LV010-25TC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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