Microchip Technology AT28LV256-25PI
- Part No.:
- AT28LV256-25PI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-DIP (0.600", 15.24mm)
- Datasheet:
-
AT28LV256-25PI.pdf
- Description:
- IC EEPROM 256KBIT PARALLEL 28DIP
- Quantity:
- Payment:

- Shipping:

Inventory:1,713
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT28LV256-25PI from Atmel is a 256 Kbit (32K × 8) parallel EEPROM with JEDEC-standard byte-wide pinout, 250 ns read access time, and single 3.0–3.6 V supply operation. It supports page write (1–64 bytes), DATA polling, and hardware/software data protection for embedded firmware storage in industrial control and instrumentation systems.
For engineers reviewing the AT28LV256-25PI datasheet, AT28LV256-25PI pinout, AT28LV256-25PI application, or AT28LV256-25PI equivalent, key selection considerations include its 10 ms max page write cycle, 20 µA CMOS standby current, JEDEC-compliant PDIP-28 package, and industrial temperature range (–40°C to +85°C).
Technical Context
The AT28LV256-25PI operates as a drop-in SRAM-compatible nonvolatile memory: CE/OE/WE control enables standard bus interfacing without external logic. Its internal 64-byte page register latches address and data on falling CE or WE edges, decoupling the host bus during autonomous internal programming.
Write completion is verified via DATA polling (I/O7 complement-to-data behavior) or TOGGLE BIT (I/O6 toggling), both usable at any point during tWC. Software Data Protection requires a three-byte unlock sequence (5555H/2AAAH/5555H) before each write, preventing inadvertent writes during power transitions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 256 Kbit (32,768 × 8), directly addressable as byte-wide parallel memory |
| Read Access Time | 250 ns max - determines minimum CPU wait-state requirement for zero-wait-state interface |
| Page Write Cycle | 10 ms max - defines worst-case firmware update latency per 64-byte block |
| Supply Voltage | 3.0 V to 3.6 V - compatible with 3.3 V system rails; no level-shifting needed |
| Standby Current | 20 µA (CMOS) - enables low-power retention in battery-backed or energy-constrained systems |
| Endurance | 10,000 write/erase cycles - supports field-upgradable firmware with moderate reprogramming frequency |
| Data Retention | 10 years at 85°C - ensures long-term reliability in industrial environments without refresh |
Pinout & Package
AT28LV256-25PI is supplied in a 28-lead plastic dual in-line package (PDIP-28), 0.600" wide, JEDEC MS-011 AB compliant, with through-hole mounting and industrial-grade thermal performance.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A14 | Address Inputs | 15-bit address bus for full 32K-word decoding; A6–A14 define page boundaries for 64-byte page writes |
| I/O0–I/O7 | Bidirectional Data Bus | Byte-wide parallel interface; I/O7 used for DATA polling, I/O6 for TOGGLE BIT status indication |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read; inhibits all writes when high |
| OE | Output Enable | Active-low output control; places I/O pins in high-impedance state when high to prevent bus contention |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; combined with CE for byte/page write initiation |
| GND / VCC | Power Terminals | Ground reference and 3.0–3.6 V supply; decoupling capacitor required within 1 cm of VCC pin |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC Byte-Wide Pinout | Direct replacement for industry-standard 27C256/27C512 EPROMs and 62256 SRAMs in legacy designs |
| 64-Byte Page Register | Reduces firmware update time by up to 64× vs. byte-write mode; eliminates host-side address management overhead |
| Hardware Write Inhibit | VCC power-on delay (~10 ms) and noise filtering (<15 ns pulses rejected) prevent spurious writes during power ramp |
| Software Data Protection | Three-byte unlock sequence (5555H/2AAAH/5555H) required before every write - blocks accidental writes from runaway code |
| Device Identification Area | 64-byte reserved sector (7FC0H–7FFFH) accessible at 12 V on A9 - enables unique serialization or calibration data storage |
Applications
| Industrial PLC Firmware Storage | Medical Device Configuration Memory |
|---|---|
|
Use Scenario: Storing firmware images and boot code in programmable logic controllers operating in harsh factory environments with wide temperature swings and electrical noise. IC Role / Device Role / Timing Role: Nonvolatile program memory providing SRAM-like read interface and guaranteed 10-year data retention at 85°C. Use Value: Eliminates need for external write-protection circuitry; 20 µA standby current extends backup battery life in fail-safe modes. |
Use Scenario: Holding calibrated sensor offsets, user preferences, and regulatory compliance settings in portable diagnostic equipment requiring traceable configuration history. IC Role / Device Role / Timing Role: Secure, tamper-resistant parameter storage with software/hardware dual-lock protection against unintended overwrites. Use Value: 10,000-cycle endurance supports field recalibration; 12 V device ID area enables secure serial number embedding. |
| Telecom Line Card Bootloader | Automotive Body Control Module |
|
Use Scenario: Hosting bootloader code and hardware initialization tables on carrier-grade line cards where hot-swap and rapid recovery are mandatory. IC Role / Device Role / Timing Role: Fast 250 ns read access enables zero-wait-state execution from memory-mapped space; page write accelerates field updates. Use Value: JEDEC pinout allows drop-in replacement of obsolete EPROMs; DATA polling simplifies host-side write timing without timers or interrupts. |
Use Scenario: Retaining adaptive learning values (e.g., window motor limits, seat position profiles) across ignition cycles in automotive body electronics. IC Role / Device Role / Timing Role: Low-voltage EEPROM interfaced directly to 3.3 V microcontroller buses; industrial temp rating ensures operation under hood conditions. Use Value: 3.0–3.6 V supply range matches automotive LDO outputs; hardware write inhibit prevents corruption during cold-cranking voltage dips. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT28C256-15PU | 5V-only supply (4.5–5.5 V); 150 ns access; no low-voltage operation | Requires level-shifting in 3.3 V systems; higher active power (25 mA) | Select only if legacy 5 V design compatibility is mandatory and voltage margin allows |
| MN5Q256B-25PL | Same 3.3 V supply and 250 ns speed; PLCC-32 package (not PDIP-28) | Requires PCB redesign due to different pin count, layout, and footprint | Consider only when board space constraints favor surface-mount or higher pin-count flexibility |
Compared with AT28LV256-25PI, AT28C256-15PU demands 5 V infrastructure and consumes more power, while MN5Q256B-25PL offers identical electrical specs but mandates mechanical redesign - making AT28LV256-25PI the optimal choice for cost-sensitive, through-hole industrial upgrades.
Availability
AT28LV256-25PI is available at Aetrix Electronics and suitable for industrial control systems, medical instrumentation, telecom infrastructure, and automotive body electronics requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for AT28LV256-25PI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, nonvolatile memory, and security ICs for embedded applications.
The AT28LV256 product line delivers low-voltage, high-reliability parallel EEPROMs designed for firmware storage, configuration retention, and calibration data logging in industrial and automotive systems where SRAM compatibility and long-term data integrity are critical.
FAQ
What is the maximum operating temperature range for the AT28LV256-25PI?
The AT28LV256-25PI is rated for industrial temperature operation from –40°C to +85°C. This specification is confirmed in the "DC and AC Operating Range" table of the official datasheet, and the "PI" suffix explicitly denotes the industrial temperature grade. The device maintains full functionality-including 250 ns read access and 10 ms page write-across this entire range.
Does the AT28LV256-25PI require a 12 V supply for normal operation?
No, the AT28LV256-25PI operates exclusively from a 3.0 V to 3.6 V supply for all standard read and write functions. A 12 V supply is required only for accessing the optional 64-byte device identification area (7FC0H–7FFFH), applied specifically to pin A9 - this is an infrequent, offline operation and not part of routine memory usage.
How does DATA polling work on the AT28LV256-25PI?
During a write cycle, reading the last written byte returns the complement of that data on I/O7. Once the internal programming completes, true data appears on I/O7 and all other I/O lines. This allows the host microcontroller to poll I/O7 in a loop without timers or interrupts - a confirmed feature documented in the "DATA POLLING" section of the AT28LV256-25PI datasheet.
Is the AT28LV256-25PI pin-compatible with standard 28-pin EPROMs like the 27C256?
Yes, the AT28LV256-25PI uses a JEDEC-approved byte-wide pinout identical to the 27C256 and 62256 SRAM, including matching A0–A14, I/O0–I/O7, CE, OE, and WE assignments. This enables direct socket replacement in existing designs without PCB modification - a key design advantage explicitly stated in the device description.
What is the purpose of the software data protection sequence on the AT28LV256-25PI?
The software data protection sequence (write 0xAA to 5555H, 0x55 to 2AAAH, then 0xA0 to 5555H) must precede every write operation on the AT28LV256-25PI. This three-byte unlock prevents accidental writes caused by noise, power glitches, or software faults - a documented safeguard detailed in the "SOFTWARE DATA PROTECTION" section of the datasheet.
AT28LV256-25PI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-DIP (0.600", 15.24mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 256Kbit
- Memory Organization:
- 32K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 250 ns
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 28-PDIP
AT28LV256-25PI FAQ
1.How can I place an order for AT28LV256-25PI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28LV256-25PI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28LV256-25PI reliable?
The price and inventory of AT28LV256-25PI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28LV256-25PI is usually 5 days.
3.What payment methods are accepted for AT28LV256-25PI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28LV256-25PI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28LV256-25PI?
AT28LV256-25PI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28LV256-25PI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28LV256-25PI?
For technical support, including AT28LV256-25PI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28LV256-25PI requirements.
6.How does Aetrix verify that AT28LV256-25PI is sourced from the original manufacturer or authorized distributors?
All AT28LV256-25PI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28LV256-25PI meets industry standards.
7.What is the process for return or replacement of AT28LV256-25PI?
All AT28LV256-25PI units undergo pre-shipment inspection (PSI). If there is an issue with AT28LV256-25PI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28LV256-25PI part is unused and in its original packaging.
Return procedure for AT28LV256-25PI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28LV256-25PI Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

