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Microchip Technology AT28LV64B-20TI
- Part No.:
- AT28LV64B-20TI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 28-TSSOP (0.465", 11.80mm Width)
- Datasheet:
-
AT28LV64B-20TI.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 28TSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,819
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Product details
Overview
AT28LV64B-20TI from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with single 3.3 V ±10% supply, 200 ns read access time, 10 ms maximum page write cycle time, and JEDEC-standard byte-wide pinout. It supports hardware/software data protection, operates across –40°C to +85°C, and delivers 15 mA active current and 20 µA CMOS standby current for industrial embedded control and firmware storage.
For engineers reviewing the AT28LV64B-20TI datasheet, AT28LV64B-20TI pinout, AT28LV64B-20TI application, or AT28LV64B-20TI equivalent, this device serves as a low-voltage, page-write-capable nonvolatile memory for boot code, configuration storage, and calibration data retention in space-constrained industrial systems requiring reliable write endurance and software-controlled write enable.
Technical Context
The AT28LV64B-20TI implements a static RAM-compatible interface with dual-line chip enable (CE) and output enable (OE) control, enabling bus contention avoidance. Its internal 64-byte page register latches address and data during page writes, decoupling the host bus after initiation.
Write completion is verified via DATA polling on I/O7 (complement-to-data toggle) or TOGGLE BIT detection on I/O6, eliminating need for fixed delay timing. Software Data Protection requires a three-byte command sequence (0xAA → 0x55 → 0xA0 at addresses 0x5555, 0x2AAA, 0x5555) before each write operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8), sufficient for small boot loaders or device configuration tables |
| Read Access Time | 200 ns max - enables direct replacement of SRAM in legacy 8-bit microcontroller interfaces |
| Page Write Cycle | 10 ms max for 1–64 bytes - reduces system wait time vs. byte-by-byte programming |
| Endurance | 100,000 write/erase cycles - supports field-updatable calibration or logging in industrial equipment |
| Data Retention | 10 years at 85°C - ensures long-term reliability in unattended embedded deployments |
| Supply Voltage | 3.3 V ±10% - compatible with modern low-voltage logic families without level-shifting |
| Operating Temp | –40°C to +85°C - qualified for industrial temperature range applications |
Pinout & Package
AT28LV64B-20TI is available in 28-lead TSOP (28T) package per JEDEC MS-012AA, with 300-mil body width and gull-wing leads. Pin 1 index mark located at top-left corner; pins 1 and 17 are no-connect (NC) in PLCC variants but not applicable here.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus supporting full 8K-word addressing; A6–A12 define page boundaries for page writes |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel data path; I/O7 used for DATA polling, I/O6 for TOGGLE BIT status indication |
| CE | Chip Enable | Active-low global enable; must be low with OE low and WE high for read access |
| OE | Output Enable | Active-low output control; high-Z state when high, preventing bus contention during writes |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; controls byte/page write initiation |
| VCC | Power Supply | +3.3 V ±10% supply; includes internal power-on delay (~10 ms) for hardware write inhibit |
| GND | Ground Reference | Signal and power return; required for stable read/write margins and noise immunity |
Key Features
| Feature | Design Value |
|---|---|
| Software Data Protection (SDP) | Three-byte unlock sequence (0xAA/0x55/0xA0) required before every write - prevents corruption during power transitions |
| Hardware Write Inhibit | VCC power-on delay + noise filtering (<15 ns pulse rejection) + CE/OE/WE logic gating - eliminates false writes from glitches |
| Page Write Architecture | 64-byte internal latch allows burst loading - frees host bus after first byte, improving system throughput |
| DATA Polling & TOGGLE BIT | Dual asynchronous write-complete detection on I/O7 and I/O6 - eliminates need for fixed timeout delays in firmware |
| Industrial Temperature Range | –40°C to +85°C operation with guaranteed 200 ns access - suitable for factory automation and outdoor electronics |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers deployed in harsh factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration memory with page-write capability and software/hardware write protection to prevent accidental overwrite during runtime or brownout. Use Value: Ensures deterministic startup behavior and regulatory compliance by preserving calibrated settings across 100,000+ power cycles and 10-year service life. |
Use Scenario: Retaining sensor offset/gain coefficients and patient-specific therapy profiles in portable diagnostic instruments. IC Role / Device Role / Timing Role: Low-power, high-reliability EEPROM interfaced directly to 8-bit microcontrollers for secure, tamper-resistant parameter storage. Use Value: Meets IEC 62304 requirements for data integrity via SDP and 10-year retention at elevated ambient temperatures. |
| Automotive Body Control Module | Network Equipment Bootloader Storage |
|
Use Scenario: Holding seat/mirror position presets, lighting profiles, and fault log history in automotive BCMs operating across extended temperature ranges. IC Role / Device Role / Timing Role: Industrial-grade parallel EEPROM providing fast 200 ns reads for real-time configuration access and robust write protection against EMI-induced errors. Use Value: Supports AEC-Q100 stress testing with 100,000-cycle endurance and guaranteed operation down to –40°C. |
Use Scenario: Storing bootloader images and MAC address tables in Ethernet switches and routers where firmware updates occur infrequently but require absolute write reliability. IC Role / Device Role / Timing Role: JEDEC-pin-compatible EEPROM acting as primary boot memory for MIPS/ARM-based SoCs with parallel bus interfaces. Use Value: Eliminates need for external level shifters (3.3 V native) and provides deterministic write completion signaling via DATA polling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST M28W640ECT | 64 Mbit (8M × 8), 3.3 V, 120 ns access, no software data protection | Larger density suited for firmware images; lacks SDP, requiring external lock logic | Select when higher capacity is needed and host can manage write enable externally |
| Microchip 25LC640A-I/P | 64 Kbit SPI EEPROM, 2.5–5.5 V, 5 ms write cycle, no page write | Serial interface reduces pin count but limits bandwidth; no page write or toggle bit | Select for space-constrained designs where SPI is preferred and write speed is secondary |
Compared with ST M28W640ECT and Microchip 25LC640A-I/P, the AT28LV64B-20TI offers optimal balance of industrial temperature support, integrated software/hardware write protection, and parallel-page-write efficiency for legacy 8-bit systems requiring deterministic, low-risk nonvolatile storage.
Availability
AT28LV64B-20TI is available at Aetrix Electronics and suitable for industrial PLCs, medical diagnostics equipment, and automotive body control modules requiring stable component supply, long-term lifecycle assurance, and guaranteed industrial temperature qualification.
Supply support for AT28LV64B-20TI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs for industrial, automotive, and consumer markets.
The AT28LV64B product line was designed specifically for low-voltage, high-reliability parallel EEPROM applications in legacy and cost-sensitive embedded systems requiring JEDEC-compatible pinouts and robust data integrity features.
FAQ
What is the operating voltage range for the AT28LV64B-20TI?
The AT28LV64B-20TI operates from a single 3.3 V supply with ±10% tolerance (2.97 V to 3.63 V). This voltage range is strictly enforced - operation outside this window may cause undefined behavior or data corruption. The device incorporates internal voltage monitoring that delays write enable until VCC exceeds 1.8 V, ensuring safe power-up sequencing. All DC and AC specifications in the datasheet are validated within this 3.3 V ±10% range for the AT28LV64B-20TI.
Does the AT28LV64B-20TI support page write operations, and what is the maximum page size?
Yes, the AT28LV64B-20TI supports page write operations with a fixed 64-byte page size. Up to 64 bytes can be loaded into the internal page register and written simultaneously in a single internal programming cycle. Each byte must be loaded within 100 µs of the previous one (tBLC), and all addresses must reside on the same page (defined by A6–A12). The maximum page write cycle time is 10 ms, significantly faster than executing 64 individual byte writes. This capability is fully implemented in the AT28LV64B-20TI and confirmed across its industrial temperature range.
How does software data protection work on the AT28LV64B-20TI?
Software Data Protection (SDP) on the AT28LV64B-20TI requires a precise three-byte unlock sequence before any write: write 0xAA to address 0x5555, then 0x55 to address 0x2AAA, then 0xA0 to address 0x5555. Only after this sequence is completed will the next write operation (byte or page) be accepted. If omitted, the AT28LV64B-20TI enters polling mode for tWC duration but writes no data. This mechanism is mandatory for all writes to the AT28LV64B-20TI and prevents corruption during power transients or software faults.
What are the valid methods to detect write completion on the AT28LV64B-20TI?
The AT28LV64B-20TI provides two independent, hardware-verified methods: DATA polling on I/O7 (returns complement of last written byte until complete) and TOGGLE BIT detection on I/O6 (toggles between 0 and 1 during write, then stabilizes). Both methods are asynchronous and do not require knowledge of write duration. They are fully functional across the full –40°C to +85°C range of the AT28LV64B-20TI and eliminate reliance on fixed timing delays in host firmware.
Is the AT28LV64B-20TI pin-compatible with standard 28-pin parallel EEPROMs?
Yes, the AT28LV64B-20TI uses a JEDEC-approved byte-wide pinout identical to industry-standard 28-pin parallel EEPROMs such as the AT28C64B and Xicor X28C64. Pin functions (A0–A12, I/O0–I/O7, CE, OE, WE, VCC, GND) match exactly, enabling drop-in replacement in existing PCB layouts. This compatibility is explicitly documented for the AT28LV64B-20TI in the "JEDEC Approved Byte-wide Pinout" feature list and confirmed across all supported packages (TSOP, SOIC, PDIP, PLCC).
AT28LV64B-20TI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 28-TSSOP (0.465", 11.80mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 200 ns
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 28-TSOP
AT28LV64B-20TI FAQ
1.How can I place an order for AT28LV64B-20TI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28LV64B-20TI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28LV64B-20TI reliable?
The price and inventory of AT28LV64B-20TI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28LV64B-20TI is usually 5 days.
3.What payment methods are accepted for AT28LV64B-20TI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28LV64B-20TI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28LV64B-20TI?
AT28LV64B-20TI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28LV64B-20TI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28LV64B-20TI?
For technical support, including AT28LV64B-20TI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28LV64B-20TI requirements.
6.How does Aetrix verify that AT28LV64B-20TI is sourced from the original manufacturer or authorized distributors?
All AT28LV64B-20TI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28LV64B-20TI meets industry standards.
7.What is the process for return or replacement of AT28LV64B-20TI?
All AT28LV64B-20TI units undergo pre-shipment inspection (PSI). If there is an issue with AT28LV64B-20TI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28LV64B-20TI part is unused and in its original packaging.
Return procedure for AT28LV64B-20TI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT28LV64B-20TI Tags
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M24C02-WMN6TP
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AT24C02C-XHM-T
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