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Microchip Technology AT28LV64B-25JC
- Part No.:
- AT28LV64B-25JC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT28LV64B-25JC.pdf
- Description:
- IC EEPROM 64KBIT PARALLEL 32PLCC
- Quantity:
- Payment:
- Shipping:
Inventory:2,667
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Product details
Overview
AT28LV64B-25JC from Atmel is a 64 Kbit (8K × 8) parallel EEPROM with 3.3 V ±10% single-supply operation, 250 ns read access time, and hardware/software data protection. It supports byte and 64-byte page write modes, delivers 15 mA active current and 20 µA CMOS standby current, and is rated for 100,000 write cycles and 10-year data retention - deployed in industrial control firmware storage and embedded configuration memory.
For engineers reviewing the AT28LV64B-25JC datasheet, AT28LV64B-25JC pinout, AT28LV64B-25JC application, or AT28LV64B-25JC equivalent, key selection criteria include JEDEC-standard byte-wide parallel interface timing, software data protection (SDP) command sequence requirements, 250 ns tACC read latency, and compatibility with 3.3 V logic systems requiring nonvolatile configuration storage without external voltage boosters.
Technical Context
The AT28LV64B-25JC operates as a static RAM-compatible parallel EEPROM: CE/OE/WE control enables direct bus interfacing without glue logic. Its internal 64-byte page register latches address and data during page writes, decoupling the host bus after initiation.
Write completion is verified via DATA polling on I/O7 (complement-to-data toggle) or TOGGLE BIT behavior on I/O6. Software Data Protection requires a three-byte unlock sequence (0xAA → 0x55 → 0xA0 at addresses 0x5555, 0x2AAA, 0x5555) before each write operation - enforced across all byte and page writes.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 64 Kbit (8,192 × 8), organized as byte-addressable parallel array |
| Read Access Time | 250 ns max (tACC), enabling direct replacement of SRAM in legacy 8-bit microcontroller buses |
| Supply Voltage | 3.3 V ±10%, eliminating need for 5 V or dual-rail support in modern low-voltage systems |
| Page Write Cycle | ≤10 ms (tWC), supporting burst configuration updates without system stall |
| Endurance | 100,000 write/erase cycles, sufficient for field-upgradable firmware parameter tables |
| Data Retention | 10 years at 85°C, validated for industrial temperature range operation |
| Standby Current | 20 µA (CMOS), enabling ultra-low-power sleep mode in battery-backed controllers |
Pinout & Package
AT28LV64B-25JC is supplied in a 32-lead Plastic J-leaded Chip Carrier (PLCC) package per JEDEC MS-016 AE. Pin 1 and Pin 17 are designated "Don't Connect" (DC); NC pins must remain unconnected.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A12 | Address Inputs | 13-bit address bus selecting one of 8,192 bytes; A6–A12 define page boundaries for 64-byte writes |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit parallel data path; I/O7 used for DATA polling, I/O6 for TOGGLE BIT status indication |
| CE | Chip Enable | Active-low chip select; must be low with OE low and WE high for read access |
| OE | Output Enable | Active-low output control; high-Z state when high, enabling bus sharing |
| WE | Write Enable | Active-low write strobe; falling edge latches address/data; initiates SDP-protected write cycle |
| VCC | Power Supply | 3.3 V ±10% supply; internal power-on delay (~10 ms) prevents spurious writes during power ramp |
| GND | Ground Reference | Signal and power return; required for stable I/O voltage referencing and noise immunity |
Key Features
| Feature | Design Value |
|---|---|
| Software Data Protection (SDP) | Three-byte unlock sequence (0xAA/0x55/0xA0) required before every write - prevents corruption during power transitions |
| 64-byte Page Write | Reduces firmware update time by up to 64× vs. byte writes; internal latching frees host bus after first byte load |
| DATA Polling & TOGGLE BIT | Dual asynchronous write-complete detection methods eliminate need for fixed delays or external timers |
| JEDEC Byte-wide Pinout | Drop-in compatible with industry-standard 28-pin and 32-pin parallel EEPROM footprints and address/data mapping |
| Industrial Temp Range | -40°C to +85°C operation validated - suitable for motor drives, PLC modules, and outdoor metering hardware |
Applications
| Industrial PLC Configuration Storage | Medical Device Calibration Data |
|---|---|
Use Scenario: Storing user-configurable I/O mapping, scaling factors, and alarm thresholds in programmable logic controllers operating in factory environments. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed via 8-bit parallel bus during boot and runtime reconfiguration; 250 ns read latency ensures real-time parameter fetch. Use Value: Enables field-upgradable settings without firmware reflashing; 100,000-cycle endurance supports daily calibration adjustments over 10+ years. |
Use Scenario: Retaining calibrated sensor offsets and gain coefficients in portable diagnostic equipment subject to frequent power cycling. IC Role / Device Role / Timing Role: Low-power EEPROM holding critical calibration constants; 20 µA standby current extends battery life between recalibrations. Use Value: Eliminates reliance on volatile RAM + backup battery; 10-year data retention meets FDA Class II device longevity requirements. |
| Automotive Body Control Module (BCM) | Networking Equipment Bootloader Parameters |
Use Scenario: Storing seat/mirror position presets, lighting profiles, and door lock configurations in automotive BCMs operating across -40°C to +85°C. IC Role / Device Role / Timing Role: Industrial-grade parallel EEPROM interfaced directly to 8-bit MCU; hardware write inhibit (OE/CE/WE logic) prevents corruption during ignition transients. Use Value: Meets AEC-Q100 stress test requirements via qualified industrial temp grade and 3.3 V single-supply robustness. |
Use Scenario: Holding MAC address, IP settings, and fail-safe boot image pointers in enterprise switches and routers. IC Role / Device Role / Timing Role: Firmware-agnostic configuration store accessed early in boot sequence; JEDEC pinout ensures compatibility with legacy board designs. Use Value: Enables zero-touch provisioning and remote configuration recovery without FPGA or flash controller overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar parallel EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| ST M28W640ECT | 5 V only supply; 120 ns read access; no software data protection | Requires level-shifting in 3.3 V systems; lacks SDP, increasing risk of inadvertent writes during brownout | Select only if legacy 5 V design and faster read speed outweigh security and voltage compatibility needs |
| Microchip 25LC640A-I/P | SPI interface (serial), 3.3 V, 5 MHz clock; no parallel bus or page write | Requires MCU SPI peripheral and software driver; eliminates address/data bus routing but adds protocol overhead | Prefer for space-constrained designs where serial interface simplifies PCB layout and reduces pin count |
Compared with ST M28W640ECT and Microchip 25LC640A-I/P, the AT28LV64B-25JC uniquely combines 3.3 V parallel interface, JEDEC pinout, integrated SDP, and 64-byte page write - making it optimal for retrofitting legacy 8-bit systems needing secure, low-power, drop-in EEPROM replacement.
Availability
AT28LV64B-25JC is available at Aetrix Electronics and suitable for industrial PLC configuration storage, medical device calibration data retention, and automotive body control module parameter backup requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for AT28LV64B-25JC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT28LV64B product line was designed for embedded systems requiring reliable, low-voltage, parallel-interface EEPROM with robust data integrity features - targeting industrial, automotive, and medical applications where firmware configurability and power efficiency are critical.
FAQ
What is the maximum read access time specified for the AT28LV64B-25JC?
The AT28LV64B-25JC has a maximum read access time (tACC) of 250 ns, measured from address valid to valid data on I/O0–I/O7. This specification applies across the full commercial temperature range (0°C to +70°C) and ensures compatibility with 4 MHz Z80 or 8051-based systems using standard wait-state logic. The AT28LV64B-25JC achieves this while operating from a single 3.3 V supply, distinguishing it from faster but 5 V-only alternatives.
Does the AT28LV64B-25JC require external high voltage for programming?
No, the AT28LV64B-25JC performs all write operations using only its 3.3 V supply - no external 12 V or VPP programming voltage is needed. The device integrates charge pumps internally to generate necessary programming voltages. However, the optional 64-byte device identification area (7FC0H–7FFFH) does require A9 raised to 12.0 V ± 0.5 V for access, but this is separate from normal memory writes and not required for standard AT28LV64B-25JC operation.
How does software data protection (SDP) work on the AT28LV64B-25JC?
Software data protection on the AT28LV64B-25JC requires a precise three-byte unlock sequence before any write: write 0xAA to address 0x5555, then 0x55 to address 0x2AAA, then 0xA0 to address 0x5555. Only after this sequence is completed will the next write pulse (to any address) initiate actual programming. The AT28LV64B-25JC ignores all write attempts lacking this sequence - a critical safeguard against power-related glitches or firmware bugs corrupting stored data.
Can the AT28LV64B-25JC be used in place of a standard SRAM for read operations?
Yes - the AT28LV64B-25JC is accessed identically to a static RAM during reads: assert CE and OE low while keeping WE high, and valid data appears on I/O0–I/O7 within 250 ns. Its outputs go high-impedance when CE or OE is high, enabling seamless integration into existing SRAM bus architectures without additional logic. Unlike SRAM, however, the AT28LV64B-25JC retains data without power, making it ideal for nonvolatile shadow RAM applications.
What package type is used for the AT28LV64B-25JC, and are there any special handling requirements?
The AT28LV64B-25JC uses a 32-lead Plastic J-leaded Chip Carrier (PLCC) package (JEDEC MS-016 AE). Pins 1 and 17 are marked "Don't Connect" (DC) and must remain unconnected - soldering or routing to these pins violates device specifications. The PLCC package supports reflow and wave soldering per Atmel's published guidelines, and its J-lead geometry provides mechanical robustness for vibration-prone industrial applications where the AT28LV64B-25JC is commonly deployed.
AT28LV64B-25JC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 64Kbit
- Memory Organization:
- 8K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 250 ns
- Voltage - Supply:
- 3V ~ 3.6V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT28LV64B-25JC FAQ
1.How can I place an order for AT28LV64B-25JC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT28LV64B-25JC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT28LV64B-25JC reliable?
The price and inventory of AT28LV64B-25JC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT28LV64B-25JC is usually 5 days.
3.What payment methods are accepted for AT28LV64B-25JC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT28LV64B-25JC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT28LV64B-25JC?
AT28LV64B-25JC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT28LV64B-25JC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT28LV64B-25JC?
For technical support, including AT28LV64B-25JC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT28LV64B-25JC requirements.
6.How does Aetrix verify that AT28LV64B-25JC is sourced from the original manufacturer or authorized distributors?
All AT28LV64B-25JC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT28LV64B-25JC meets industry standards.
7.What is the process for return or replacement of AT28LV64B-25JC?
All AT28LV64B-25JC units undergo pre-shipment inspection (PSI). If there is an issue with AT28LV64B-25JC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT28LV64B-25JC part is unused and in its original packaging.
Return procedure for AT28LV64B-25JC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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