Microchip Technology AT29C010A-90JI
- Part No.:
- AT29C010A-90JI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-LCC (J-Lead)
- Datasheet:
-
AT29C010A-90JI.pdf
- Description:
- IC FLASH 1MBIT PARALLEL 32PLCC
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
AT29C010A-90JI from Atmel is a 1 Mbit (128K × 8) 5V-only Flash memory IC used for nonvolatile code and data storage in embedded systems. It delivers 90 ns read access time, supports sector-based reprogramming with 1024 × 128-byte sectors, includes dual 8K-byte boot blocks with independent lockout, and operates across -40°C to +85°C industrial temperature range.
For engineers reviewing the AT29C010A-90JI datasheet, AT29C010A-90JI pinout, AT29C010A-90JI application, or AT29C010A-90JI equivalent, this page provides verified functional identity, validated PLCC-32 pin mapping, confirmed sector-program timing (10 ms), hardware/software data protection mechanisms, and real-world boot-code storage use cases - all directly traceable to Atmel's official documentation.
Technical Context
The AT29C010A-90JI implements a sector-erase/program architecture where each 128-byte sector is internally latched before simultaneous programming; address lines A7–A16 select the sector, while A0–A6 index within it. Its dual boot blocks (first/last 8K bytes) support secure firmware startup with independent software-lockout activation via 7-command sequence.
Hardware data protection relies on VCC sense (<3.8 V inhibits programming), 5 ms power-on delay, and noise filtering (<15 ns pulses ignored); software protection requires a 3-byte command sequence (AAh/55h/A0h) to enable, and a distinct 6-byte sequence to disable. DATA polling on I/O7 and toggle-bit detection on I/O6 provide deterministic end-of-program signaling.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 1 Mbit (131,072 × 8), enabling full firmware image storage for 8-bit microcontrollers |
| Read Access Time | 90 ns max - meets timing requirements for 11 MHz bus interfaces without wait states |
| Sector Size | 128 bytes × 1024 sectors - allows fine-grained updates without erasing entire device |
| Program Cycle Time | 10 ms per sector - enables predictable in-system firmware patching latency |
| Supply Voltage | 5 V ± 10% - compatible with legacy 5V logic rails and eliminates need for charge pumps |
| Endurance | >10,000 program/erase cycles per sector - supports field-upgradable industrial controllers |
| Standby Current | 300 µA max at -40°C to +85°C - suitable for low-power battery-backed applications |
| Operating Temperature | -40°C to +85°C - qualified for industrial control, automotive body electronics, and telecom infrastructure |
Pinout & Package
AT29C010A-90JI is packaged in a 32-lead Plastic J-Leaded Chip Carrier (PLCC-32), compliant with JEDEC MS-016 Variation AE. The package features gull-wing leads, 1.27 mm pitch, and a 12.45 mm × 14.00 mm body size with 3.3 mm height.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A16 | Address Inputs | 17-bit address bus supporting full 131,072-word addressing; A0–A6 select byte within 128-byte sector |
| CE | Chip Enable | Active-low chip select; must be low for read/program; high disables outputs and enables CMOS standby mode |
| OE | Output Enable | Active-low output control; used with CE to manage bus contention during reads; must be high during programming |
| WE | Write Enable | Active-low write strobe; initiates byte load and sector programming; toggling within 150 µs enables multi-byte loading |
| I/O0–I/O7 | Bi-directional Data Bus | 8-bit parallel interface; carries data during reads, accepts input during byte loads; supports DATA polling on I/O7 and toggle-bit on I/O6 |
| NC | No Connect | Two unconnected pins (PLCC pins 6 and 13) - must remain floating; no internal connection or function |
| VCC | Power Supply | +5 V ± 10% supply; powers core logic and I/O buffers; VCC sense circuitry prevents programming below 3.8 V |
| GND | Ground | Reference for all inputs/outputs; decoupling capacitor required near VCC pin for stable operation |
Key Features
| Feature | Design Value |
|---|---|
| Dual Boot Block Lockout | Independent software-enableable write protection for first and last 8K-byte regions - secures bootloader and configuration data against accidental overwrite |
| Hardware + Software Data Protection | VCC sensing, 5 ms power-on delay, and noise filtering prevent spurious writes; 3-byte unlock sequence adds controlled access layer for firmware updates |
| DATA Polling & Toggle Bit | I/O7 complement indicates active programming; I/O6 toggling provides asynchronous status - both eliminate need for fixed delays or external timers |
| Single 5V Supply Operation | No external high-voltage programming supply required - simplifies PCB design and reduces BOM cost versus EPROM or older Flash devices |
| CMOS/TTL Compatibility | Input thresholds (VIL = 0.8 V, VIH = 2.0 V) and output drive (VOH = 2.4 V @ -400 µA) ensure interoperability with both logic families |
| Industrial Temperature Range | Guaranteed functionality from -40°C to +85°C - validated for deployment in motor drives, PLC modules, and outdoor networking equipment |
Applications
| Industrial PLC Firmware Storage | Legacy Embedded System Boot Code |
|---|---|
|
Use Scenario: Storing firmware and configuration tables in programmable logic controllers deployed in factory automation environments with wide ambient temperature swings. IC Role / Device Role / Timing Role: Nonvolatile code storage IC providing direct 8-bit bus interface to microcontroller; 90 ns access ensures real-time scan cycle execution without wait states. Use Value: Dual boot blocks allow safe field updates: primary firmware runs from protected lower block while new version is written to upper block, enabling atomic firmware swaps. |
Use Scenario: Hosting boot ROM and initialization routines in legacy 8051- or Z80-based medical instruments requiring long-term reliability and infrequent field upgrades. IC Role / Device Role / Timing Role: Pin-compatible Flash replacement for UV-erasable EPROMs; identical read protocol enables drop-in upgrade without hardware redesign. Use Value: 10,000-cycle endurance and software data protection prevent corruption during power-loss events common in clinical settings with unstable mains supply. |
| Telecom Line Card Configuration | Automotive Body Control Module |
|
Use Scenario: Holding line-specific calibration data, protocol stacks, and fault logs in DSLAM and optical line terminal cards operating continuously in telecom central offices. IC Role / Device Role / Timing Role: Sector-erasable nonvolatile memory interfaced to DSP or ARM host; 128-byte granularity enables efficient parameter updates without full-device erase. Use Value: Hardware VCC-sense and noise filtering eliminate false writes during voltage sags or EMI transients typical in dense rack-mounted telecom gear. |
Use Scenario: Storing vehicle-specific configuration (e.g., door lock behavior, lighting profiles) and diagnostic trouble codes in BCMs for passenger vehicles. IC Role / Device Role / Timing Role: Industrial-grade Flash memory connected to CAN-linked microcontroller; operates reliably across -40°C cold cranking to +85°C under-hood conditions. Use Value: Boot block lockout prevents accidental overwriting of safety-critical initialization code during dealership reprogramming sessions using standard J2534 tools. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| MX29LV160CBTI-90G | 3.3 V core supply (5 V tolerant I/O), 16 Mbit density, 90 ns access, CFI-compliant command set | Requires level-shifting for pure 5 V systems; larger capacity suits complex bootloaders but increases cost and layout area | Select when migrating to lower-power 3.3 V designs or needing CFI-standardized firmware update protocols |
| EN29LV160AB-90TIP | 3.3 V supply only, 16 Mbit, top-boot configuration, 90 ns access, supports reset-pin-based hardware protection | Incompatible with 5 V-only buses; top-boot layout differs from AT29C010A-90JI's dual boot blocks - limits flexibility for bottom-boot systems | Prefer for new 3.3 V designs requiring JEDEC-standard boot block ordering and integrated reset protection |
Compared with MX29LV160CBTI-90G and EN29LV160AB-90TIP, the AT29C010A-90JI uniquely supports true 5 V-only operation with dual independently lockable boot blocks - making it the only viable choice for legacy 5 V industrial controllers requiring guaranteed compatibility and sector-level update safety.
Availability
AT29C010A-90JI is available at Aetrix Electronics and suitable for industrial PLC firmware storage, legacy embedded system boot code, telecom line card configuration, automotive body control modules, and medical instrument calibration data requiring stable component supply across extended lifecycle demands.
Supply support for AT29C010A-90JI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a semiconductor manufacturer specializing in microcontrollers, Flash memory, and secure authentication ICs for industrial, automotive, and consumer applications.
The AT29C010A-90JI belongs to Atmel's legacy 5V Flash memory product line, designed specifically for pin-compatible EPROM replacement and in-system reprogrammability in cost-sensitive, temperature-rugged embedded systems.
FAQ
What is the maximum operating temperature range for the AT29C010A-90JI?
The AT29C010A-90JI is rated for industrial temperature operation from -40°C to +85°C. This specification is guaranteed per Atmel's official datasheet Rev. 0394F–FLASH–02/03 and validated across all electrical parameters including read access time (90 ns), program cycle time (10 ms), and standby current (≤300 µA). The "I" suffix in AT29C010A-90JI explicitly denotes industrial qualification.
Does the AT29C010A-90JI require a high-voltage programming supply?
No, the AT29C010A-90JI operates with a single 5 V ± 10% supply for both read and program operations. Programming is enabled via standard 5 V logic-level commands (e.g., AAh/55h/A0h sequences), eliminating the need for external 12 V or higher programming voltages. This is confirmed in the "Features" section and "Device Operation" chapter of the AT29C010A-90JI datasheet.
How many sectors does the AT29C010A-90JI have, and what is the sector size?
The AT29C010A-90JI contains 1024 sectors, each 128 bytes in size. This is explicitly stated in the "Features" list and supported by the memory organization (131,072 words × 8 bits = 1 Mbit). Sector addressing uses A7–A16, while A0–A6 select the byte within the sector - a detail verified in the "PROGRAM" subsection of the "Device Operation" section.
Can the boot blocks on the AT29C010A-90JI be locked independently?
Yes, the AT29C010A-90JI has two 8K-byte boot blocks - one at the lowest addresses (0x00000–0x01FFF) and one at the highest (0x1E000–0x1FFFF) - and each can be locked independently using a dedicated 7-command software sequence. This capability is documented in the "BOOT BLOCK PROGRAMMING LOCKOUT" section and illustrated in the "Boot Block Lockout Feature Enable Algorithm" flowchart.
What methods does the AT29C010A-90JI provide to detect end-of-program completion?
The AT29C010A-90JI offers two hardware-confirmed methods: DATA polling on I/O7 (returns complement of loaded data until completion) and toggle-bit detection on I/O6 (toggles between 0 and 1 during programming, then stabilizes). Both are defined in the "DATA POLLING" and "TOGGLE BIT" sections of the datasheet, with timing waveforms and characteristics provided in Figures 11 and 12.
AT29C010A-90JI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-LCC (J-Lead)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-PLCC (13.97x11.43)
AT29C010A-90JI FAQ
1.How can I place an order for AT29C010A-90JI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT29C010A-90JI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT29C010A-90JI reliable?
The price and inventory of AT29C010A-90JI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT29C010A-90JI is usually 5 days.
3.What payment methods are accepted for AT29C010A-90JI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT29C010A-90JI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT29C010A-90JI?
AT29C010A-90JI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT29C010A-90JI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT29C010A-90JI?
For technical support, including AT29C010A-90JI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT29C010A-90JI requirements.
6.How does Aetrix verify that AT29C010A-90JI is sourced from the original manufacturer or authorized distributors?
All AT29C010A-90JI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT29C010A-90JI meets industry standards.
7.What is the process for return or replacement of AT29C010A-90JI?
All AT29C010A-90JI units undergo pre-shipment inspection (PSI). If there is an issue with AT29C010A-90JI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT29C010A-90JI part is unused and in its original packaging.
Return procedure for AT29C010A-90JI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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