Microchip Technology AT29C010A-90TC
- Part No.:
- AT29C010A-90TC
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 32-TFSOP (0.724", 18.40mm Width)
- Datasheet:
-
AT29C010A-90TC.pdf
- Description:
- IC FLASH 1MBIT PARALLEL 32TSOP
- Quantity:
- Payment:

- Shipping:

Inventory:2,686
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT29C010A-90TC from Atmel is a 5V-only, 1 Mbit (128K × 8) Flash memory IC designed for in-system reprogrammability in embedded boot code and firmware storage applications. It delivers 90 ns read access time, supports sector-based programming with 1024 × 128-byte sectors, includes two independent 8K-byte boot blocks with programmable lockout, and operates across commercial temperature range (0°C to 70°C) in a 32-lead TSOP package.
For engineers reviewing the AT29C010A-90TC datasheet, AT29C010A-90TC pinout, AT29C010A-90TC application, or AT29C010A-90TC equivalent, this page provides verified technical context, real-world use cases, validated alternatives, and supply-chain-ready availability details specific to the -90TC speed grade and TSOP packaging.
Technical Context
The AT29C010A-90TC implements a sector-erase/program architecture where each 128-byte sector is internally latched before simultaneous programming, freeing the address/data bus during tWC = 10 ms internal cycle. It uses standard 5V-only command sequences-no high-voltage programming required-and integrates hardware data protection via VCC sensing (<3.8V inhibit), noise filtering (<15 ns pulse rejection), and CE/OE/WE state monitoring.
Software data protection is enabled via a three-byte unlock sequence (AAh→55h→A0h at 5555h/2AAAh/5555h), after which all program cycles require repetition of that sequence. Boot block lockout is independently configurable for lower (0x0000–0x1FFF) and upper (0x1F800–0x1FFFF) 8K-byte regions using a seven-command algorithm, disabling chip erase if either is activated.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Density | 1 Mbit (131,072 × 8 bits) - supports full firmware images for 8-bit microcontrollers and BIOS-level boot code. |
| Read Access Time | 90 ns - enables direct execution from flash (XIP) in timing-critical 5 MHz bus systems without wait states. |
| Sector Size & Count | 1024 sectors × 128 bytes - allows fine-grained firmware updates without erasing entire device; reduces field upgrade risk. |
| Program Cycle Time | 10 ms per sector - deterministic latency for host MCU firmware update routines; supports polling via I/O7 or toggle bit on I/O6. |
| VCC Supply | 5 V ± 10% - compatible with legacy 5V logic families and eliminates need for dedicated programming voltage rails. |
| Endurance | >10,000 write/erase cycles per sector - sufficient for field firmware patching over 5+ year product lifecycles. |
| Standby Current | 100 µA (CMOS) - enables low-power retention in battery-backed systems during sleep modes. |
| Operating Temp | 0°C to 70°C - qualified for commercial-grade industrial control panels and office equipment environments. |
Pinout & Package
AT29C010A-90TC is packaged in a 32-lead Thin Small Outline Package (TSOP, Type I, 8 mm × 20 mm, JEDEC MO-142 BD), pin-compatible with other AT29C010A speed grades in TSOP format. Pin 1 identifier is marked by a beveled corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0–A16 | Address Inputs | 17-bit address bus supporting full 131,072-word addressing; A0–A6 select byte within 128-byte sector. |
| CE | Chip Enable | Active-low chip select; must be low for read/program; high forces outputs to high-Z and disables internal logic. |
| OE | Output Enable | Active-low output control; used with CE to gate data bus access and prevent contention during shared-bus operation. |
| WE | Write Enable | Active-low write strobe; initiates byte load and sector programming; combined with CE/OE defines operational mode. |
| I/O0–I/O7 | Bidirectional Data Bus | 8-bit CMOS/TTL-compatible data path; carries input data during programming and output data during read; supports DATA polling on I/O7 and toggle detection on I/O6. |
| NC | No Connect | Two unconnected pins (positions 6 and 9 in TSOP top view); must remain floating-no external tie required. |
| VCC | Power Supply | +5 V ± 10% main supply; powers core logic and I/O buffers; requires local 0.1 µF ceramic decoupling. |
| GND | Ground | Signal and power reference plane; pin 23 in TSOP; must be low-inductance connection to minimize noise during programming. |
Key Features
| Feature | Design Value |
|---|---|
| Single 5V Reprogramming | Eliminates need for +12V programming supplies or external charge pumps-simplifies system power design and reduces BOM cost. |
| Dual Boot Block Lockout | Independent 8K-byte lockout for lower (0x0000–0x1FFF) and upper (0x1F800–0x1FFFF) regions prevents accidental overwrite of critical boot code during field updates. |
| Hardware + Software Data Protection | VCC sense, noise filtering, and 3-byte unlock sequence jointly prevent spurious writes during power-up/down, EMI events, or software glitches. |
| DATA Polling & Toggle Bit | I/O7 complement polling and I/O6 toggle provide dual, non-intrusive methods to detect program completion-enables robust host firmware state machines. |
| Internal Address/Data Latches | Latches full 128-byte sector data internally during load phase, freeing external bus for concurrent operations-improves system throughput during firmware updates. |
| CMOS/TTL I/O Compatibility | Meets VIH ≥ 2.0 V and VIL ≤ 0.8 V thresholds for both logic families-ensures interoperability with legacy 8051, Z80, and 68K-based controllers. |
Applications
| Industrial PLC Firmware Storage | Legacy PC BIOS Flash Replacement |
|---|---|
|
Use Scenario: Storing ladder logic firmware and configuration data in modular programmable logic controllers requiring field-upgradable code without hardware rework. IC Role / Device Role / Timing Role: Nonvolatile firmware storage with sector-level update capability; 90 ns access supports real-time scan cycle execution directly from flash. Use Value: Enables remote firmware patches via serial interface while preserving boot integrity via locked 8K boot blocks-reducing downtime and service costs. |
Use Scenario: Replacing obsolete 27C010 EPROMs in legacy desktop/server motherboards where socketed BIOS storage is retained for compatibility. IC Role / Device Role / Timing Role: Drop-in 5V-compatible Flash ROM with identical pinout and read timing; supports standard EPROM emulation during POST. Use Value: Eliminates UV eraser dependency and enables in-system BIOS updates via standard ISA/LPC interfaces-extending lifecycle of aging platforms. |
| Medical Device Bootloader Storage | Point-of-Sale Terminal Application Code |
|
Use Scenario: Holding certified bootloader code in Class II medical instruments where regulatory validation prohibits runtime modification of secure boot assets. IC Role / Device Role / Timing Role: Read-only boot memory with hardware-enforced lockout; 100 µA standby current supports battery-backed safe-mode retention. Use Value: Locks lower 8K boot sector post-certification while allowing application code updates in remaining sectors-maintaining FDA 510(k) compliance. |
Use Scenario: Storing payment processing application firmware in retail POS terminals deployed globally with regional language and tax rule variants. IC Role / Device Role / Timing Role: Field-upgradable application storage; sector programming enables delta updates without full image reload over slow GPRS links. Use Value: Reduces OTA update payload size by >90% versus full-image replacement-cutting cellular data costs and improving deployment success rate. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Flash memory applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AM29LV010B-90EC | 3.3V core with 5V I/O tolerance; 90 ns read; 1 Mbit; no boot block lockout; requires VPP = 12V for reset. | Lacks dedicated boot block protection; requires level-shifting for pure 5V systems; higher standby current (1 µA vs 100 µA). | Select when migrating to 3.3V systems or needing faster erase times; avoid if boot security or 5V-only simplicity is required. |
| SST39VF010-90-4C-NHE | 3.3V supply only; 90 ns read; 1 Mbit; single 4K-byte boot block; no hardware VCC sense protection. | Not 5V-compatible; incompatible with legacy 5V buses; boot block is fixed-size and not independently lockable. | Choose for new 3.3V designs with simpler boot requirements; unsuitable as drop-in replacement for AT29C010A-90TC in existing 5V hardware. |
Compared with AM29LV010B-90EC and SST39VF010-90-4C-NHE, the AT29C010A-90TC uniquely combines true 5V-only operation, dual independently lockable boot blocks, and hardware VCC sensing-making it the only option for secure, legacy-compatible firmware storage where voltage simplification and boot integrity are mandatory.
Availability
AT29C010A-90TC is available at Aetrix Electronics and suitable for industrial PLC firmware storage, legacy PC BIOS replacement, and medical device bootloader applications requiring stable component supply and long-term obsolescence management.
Supply support for AT29C010A-90TC includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Atmel Corporation (now part of Microchip Technology) is a fabless semiconductor company specializing in microcontrollers, nonvolatile memory, and secure authentication ICs.
The AT29C010A belongs to Atmel's 5V Flash memory product line, engineered for seamless EPROM replacement and in-system firmware upgradability in cost-sensitive, reliability-critical embedded systems.
FAQ
What is the maximum operating frequency supported by AT29C010A-90TC for reliable read access?
The AT29C010A-90TC guarantees 90 ns read access time (tACC) under commercial conditions (0°C to 70°C, VCC = 5 V ± 10%). This corresponds to a maximum sustained read frequency of approximately 11 MHz-though system-level timing margins, bus loading, and PCB layout may limit practical operation to ≤5 MHz for robustness. The AT29C010A-90TC datasheet specifies tACC = 90 ns as the limiting parameter, not clock frequency directly.
Does AT29C010A-90TC support full-chip erase, and how is it initiated?
Yes, AT29C010A-90TC supports optional software chip erase using a 6-byte unlock and command sequence (AAh→55h→80h→AAh→55h→10h at addresses 5555h/2AAAh/5555h/5555h/2AAAh/5555h). However, chip erase is disabled if either boot block has been locked out. The AT29C010A-90TC does not support hardware chip erase-only sector and chip-level erasure via software commands.
How is boot block lockout verified on AT29C010A-90TC after activation?
Boot block lockout status is verified via Software Product Identification mode: reading address 0x00002 returns 0xFE if the lower boot block (0x0000–0x1FFF) is unlocked or 0xFF if locked; reading address 0x1FFF2 returns the same codes for the upper boot block (0x1F800–0x1FFFF). The AT29C010A-90TC exits identification mode using the F0h command at 5555h after a 10 ms pause.
Can AT29C010A-90TC be used in industrial temperature applications?
No-AT29C010A-90TC is rated only for commercial temperature range (0°C to 70°C). For industrial operation (−40°C to +85°C), the correct variant is AT29C010A-90TI (TSOP) or AT29C010A-90JI (PLCC). Using AT29C010A-90TC outside its specified range risks timing violations, increased standby current, and reduced endurance; the AT29C010A-90TC datasheet explicitly defines its operating limits.
What happens if a program command is issued to AT29C010A-90TC without first enabling software data protection?
Software data protection is disabled by default at factory shipment. Program commands execute normally without any unlock sequence until the AAh→55h→A0h enable sequence is executed. Once enabled, all subsequent program cycles-including sector loads and chip erase-require repetition of that exact 3-byte sequence. The AT29C010A-90TC ignores invalid sequences but starts internal timers, causing I/O7 polling to return complement data until timeout.
AT29C010A-90TC Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 32-TFSOP (0.724", 18.40mm Width)
- Packaging:
- Tray
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- FLASH
- Technology:
- FLASH
- Memory Size:
- 1Mbit
- Memory Organization:
- 128K x 8
- Memory Interface:
- Parallel
- Clock Frequency:
- -
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- 90 ns
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- 0°C ~ 70°C (TC)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 32-TSOP
AT29C010A-90TC FAQ
1.How can I place an order for AT29C010A-90TC through Aetrix?
Please submit a Request for Quotation (RFQ) for AT29C010A-90TC on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT29C010A-90TC reliable?
The price and inventory of AT29C010A-90TC are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT29C010A-90TC is usually 5 days.
3.What payment methods are accepted for AT29C010A-90TC?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT29C010A-90TC transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT29C010A-90TC?
AT29C010A-90TC orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT29C010A-90TC order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT29C010A-90TC?
For technical support, including AT29C010A-90TC datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT29C010A-90TC requirements.
6.How does Aetrix verify that AT29C010A-90TC is sourced from the original manufacturer or authorized distributors?
All AT29C010A-90TC products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT29C010A-90TC meets industry standards.
7.What is the process for return or replacement of AT29C010A-90TC?
All AT29C010A-90TC units undergo pre-shipment inspection (PSI). If there is an issue with AT29C010A-90TC, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT29C010A-90TC part is unused and in its original packaging.
Return procedure for AT29C010A-90TC:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT29C010A-90TC Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

