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Microchip Technology AT34C02D-XHM-B

Name: AT34C02D-XHM-B
Brand: Microchip Technology
SKU: AT34C02D-XHM-B
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

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Part No.:: AT34C02D-XHM-B

Manufacturer:: Microchip Technology

Category:: Memory

Package:: 8-TSSOP (0.173", 4.40mm Width)

Datasheet:: AT34C02D-XHM-B.pdf

Description:: IC EEPROM 2KBIT I2C 1MHZ 8TSSOP

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Product details

Overview

AT34C02D-XHM-B from Microchip Technology (formerly Atmel) is a JEDEC EE1002/EE1002A-compliant Serial Presence Detect (SPD) EEPROM for DDR/DDR2/DDR3 DIMM modules, providing 2 Kbit (256 × 8) nonvolatile memory with I²C-compatible 2-wire interface, 1.7V–5.5V supply, and hardware/software write protection. It supports 400 kHz (1.7V/2.5V) and 1 MHz (5.0V) clock rates and operates across –40°C to +85°C.

For engineers reviewing the AT34C02D-XHM-B datasheet, AT34C02D-XHM-B pinout, AT34C02D-XHM-B application, or AT34C02D-XHM-B equivalent, key selection considerations include SPD compliance, dual software write protection modes (permanent and reversible), hardware WP pin control, 16-byte page write capability, and industrial-grade 8-lead TSSOP packaging with NiPdAu finish.

Technical Context

The AT34C02D-XHM-B implements a dedicated SPD EEPROM architecture with fixed 256-word × 8-bit organization, internally segmented into 16 pages of 16 bytes each. Its I²C interface uses open-drain SDA/SCL with Schmitt-triggered inputs for noise immunity and supports standard device addressing (1010 A2 A1 A0 R/W) plus special command codes (0110xxx) for write protect register access.

Write protection logic combines three independent mechanisms: hardware-level inhibition via WP pin (VCC = full-array lock), permanent software lock of lower 128 bytes (00h–7Fh), and reversible software lock of the same region-each requiring distinct address/control byte sequences and voltage conditions (e.g., VHV ≥ 7V for RSWP programming). All protections enforce tWR = 5 ms max self-timed write cycles.

Key Specifications

Parameter	Value and Actual Design Meaning
Memory Size	2,048 bits (256 × 8), organized as 16 pages × 16 bytes - enables SPD data storage for DDR/DDR2/DDR3 module configuration.
Interface	I²C-compatible 2-wire serial (SDA/SCL) - interoperable with standard microcontroller I²C peripherals without protocol translation.
Supply Voltage	1.7 V to 5.5 V - supports wide-range DIMM power rails including 1.8 V, 2.5 V, 3.3 V, and 5.0 V systems.
Max Clock Frequency	400 kHz at 1.7 V/2.5 V; 1 MHz at 5.0 V - ensures timing compliance across DDR generations while maintaining noise margin.
Write Endurance	1,000,000 cycles - sufficient for repeated SPD updates during system manufacturing, calibration, and field reconfiguration.
Data Retention	100 years at +25°C - guarantees long-term persistence of memory module identity, timing, and thermal parameters.
Operating Temperature	–40°C to +85°C - qualified for industrial-grade DIMM operation in servers, workstations, and embedded computing.

Pinout & Package

AT34C02D-XHM-B is packaged in an 8-lead TSSOP (Package Code: 8X), 4.4 mm body width, green RoHS-compliant construction with NiPdAu lead finish. Pin 1 is marked by a beveled corner on the top surface.

Pin/Terminal	Circuit Role	Design Meaning
A0–A2	Hardware Device Address Inputs	Enable up to eight AT34C02D devices on one I²C bus; hardwired to GND/VCC to set unique 3-bit address portion of 7-bit slave address (1010xxxR/W).
GND	Ground Reference	Primary return path for VCC and signal currents; must be low-impedance connection to avoid noise coupling into SDA/SCL lines.
SDA	Serial Data Bidirectional Line	Open-drain I²C data line; requires external pull-up resistor (typically 1–10 kΩ); supports wire-OR with other I²C devices.
SCL	Serial Clock Input	Positive-edge clock input for data latching; negative-edge sampling for data output; Schmitt-triggered for robust noise rejection.
WP	Hardware Write Protect Control	Active-high enable: VCC = full-array write lock; GND/floating = software protection modes active; internal pull-down prevents undefined state.
VCC	Power Supply Input	Single-supply rail supporting 1.7–5.5 V; decoupling capacitor (0.1 µF ceramic) required within 10 mm of pin for stable operation.

Key Features

Feature	Design Value
JEDEC EE1002/EE1002A SPD Compliance	Fully satisfies DDR/DDR2/DDR3 DIMM Serial Presence Detect specification - enables plug-and-play memory module identification and timing parameter loading by host BIOS/UEFI.
Dual Software Write Protection	Permanent lock (irreversible, lower 128 bytes) and reversible lock (programmable/unlockable, same region) - allows secure factory programming and field-safe user configuration.
Hardware Write Protect (WP Pin)	Physically disables all writes regardless of software state - provides fail-safe protection during system boot or firmware update sequences.
16-Byte Page Write Mode	Enables burst programming of up to 16 contiguous bytes per write cycle - reduces I²C transaction overhead and accelerates SPD table updates.
Self-Timed Write Cycle	Fixed 5 ms maximum internal erase/write time - eliminates need for external timing control; ACK polling confirms completion before next command.

Applications

DDR3 Server Memory Module	Industrial DDR2 Workstation DIMM
Use Scenario: Storing SPD data (module type, density, timings, thermal specs) on registered DDR3 RDIMMs used in enterprise servers. IC Role / Device Role / Timing Role: Dedicated SPD EEPROM interfacing directly with memory controller's I²C bus during power-on initialization. Use Value: Enables automatic memory configuration without manual BIOS setup; AT34C02D-XHM-B's 1.7–5.5 V range supports both 1.5 V DDR3 and 1.35 V DDR3L supply domains.	Use Scenario: Providing SPD information for unbuffered DDR2 UDIMMs deployed in ruggedized industrial PCs operating in extended temperature environments. IC Role / Device Role / Timing Role: Nonvolatile configuration storage accessed at boot via SMBus/I²C; withstands repeated thermal cycling and voltage transients. Use Value: AT34C02D-XHM-B's –40°C to +85°C rating and 100-year data retention ensure reliable SPD persistence over product lifetime in harsh settings.
Embedded DDR Memory Subsystem	Memory Module Calibration System
Use Scenario: Integrating SPD functionality into custom DDR-based SoM (System-on-Module) designs where space-constrained PCB layout favors TSSOP packaging. IC Role / Device Role / Timing Role: Compact, pin-compatible SPD solution replacing legacy AT24C02 variants while adding enhanced write protection granularity. Use Value: 8-lead TSSOP (4.4 mm width) footprint matches common DDR module routing constraints; NiPdAu finish ensures solderability and corrosion resistance.	Use Scenario: Factory programming of vendor-specific SPD extensions (e.g., thermal sensor offsets, custom timing margins) during memory module burn-in and calibration. IC Role / Device Role / Timing Role: Secure, multi-layer protected EEPROM allowing controlled write access: permanent lock for base SPD, reversible lock for field-updatable fields. Use Value: Dual software protection modes prevent accidental overwrite of critical factory data while permitting authorized updates to calibration parameters post-deployment.

DDR3 Server Memory Module

Industrial DDR2 Workstation DIMM

Use Scenario: Storing SPD data (module type, density, timings, thermal specs) on registered DDR3 RDIMMs used in enterprise servers.

IC Role / Device Role / Timing Role: Dedicated SPD EEPROM interfacing directly with memory controller's I²C bus during power-on initialization.

Use Value: Enables automatic memory configuration without manual BIOS setup; AT34C02D-XHM-B's 1.7–5.5 V range supports both 1.5 V DDR3 and 1.35 V DDR3L supply domains.

Use Scenario: Providing SPD information for unbuffered DDR2 UDIMMs deployed in ruggedized industrial PCs operating in extended temperature environments.

IC Role / Device Role / Timing Role: Nonvolatile configuration storage accessed at boot via SMBus/I²C; withstands repeated thermal cycling and voltage transients.

Use Value: AT34C02D-XHM-B's –40°C to +85°C rating and 100-year data retention ensure reliable SPD persistence over product lifetime in harsh settings.

Embedded DDR Memory Subsystem

Memory Module Calibration System

Use Scenario: Integrating SPD functionality into custom DDR-based SoM (System-on-Module) designs where space-constrained PCB layout favors TSSOP packaging.

IC Role / Device Role / Timing Role: Compact, pin-compatible SPD solution replacing legacy AT24C02 variants while adding enhanced write protection granularity.

Use Value: 8-lead TSSOP (4.4 mm width) footprint matches common DDR module routing constraints; NiPdAu finish ensures solderability and corrosion resistance.

Use Scenario: Factory programming of vendor-specific SPD extensions (e.g., thermal sensor offsets, custom timing margins) during memory module burn-in and calibration.

IC Role / Device Role / Timing Role: Secure, multi-layer protected EEPROM allowing controlled write access: permanent lock for base SPD, reversible lock for field-updatable fields.

Use Value: Dual software protection modes prevent accidental overwrite of critical factory data while permitting authorized updates to calibration parameters post-deployment.

Equivalent & Alternatives

The following parts are listed as comparable options for similar SPD EEPROM applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
AT24C02D-SSHM-T	Same 2 Kbit density and I²C interface, but lacks JEDEC EE1002/EE1002A SPD compliance and dual software write protection; only hardware WP pin.	Intended for general-purpose EEPROM use, not certified for DDR/DDR2/DDR3 SPD function; no guaranteed SPD data structure support.	Select only if SPD compliance is unnecessary and cost is prioritized over standardized memory module interoperability.
M95256-WMN6TP	256 Kbit SPI EEPROM (not I²C), no SPD compliance, no reversible software write protection; operates 1.8–5.5 V with 20 MHz SPI clock.	Requires SPI-capable host controller instead of I²C; incompatible with standard SPD read sequences defined in JEDEC specifications.	Use only in non-SPD systems where higher density and faster serial interface outweigh protocol compatibility requirements.

Compared with AT24C02D-SSHM-T and M95256-WMN6TP, the AT34C02D-XHM-B uniquely delivers JEDEC-mandated SPD functionality, dual-mode software write protection, and guaranteed I²C timing for DDR memory initialization-making it the only suitable choice for compliant DIMM designs.

Availability

AT34C02D-XHM-B is available at Aetrix Electronics and suitable for DDR3 server memory modules, industrial DDR2 workstation DIMMs, and embedded DDR memory subsystems requiring stable component supply, long-lifecycle support, and JEDEC SPD compliance.

Supply support for AT34C02D-XHM-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology acquired Atmel in 2016 and maintains full product continuity, quality assurance, and technical documentation for the AT34C02D family.

The AT34C02D series was designed specifically for JEDEC-compliant Serial Presence Detect in DDR/DDR2/DDR3 memory modules, emphasizing reliability, low-voltage operation, and robust write protection for mission-critical memory configuration data.

FAQ

What is the primary function of the AT34C02D-XHM-B in memory module design?

The AT34C02D-XHM-B serves as a JEDEC EE1002/EE1002A-compliant Serial Presence Detect (SPD) EEPROM, storing critical configuration data-including module type, density, timing parameters, and thermal specifications-for DDR, DDR2, and DDR3 DIMMs. During system boot, the memory controller reads this data via I²C to auto-configure memory operation. Its 2 Kbit capacity, 1.7–5.5 V supply, and industrial temperature range make it ideal for server and embedded memory applications where AT34C02D-XHM-B ensures reliable, standards-based initialization.

How does the hardware write protect (WP) pin function on the AT34C02D-XHM-B?

On the AT34C02D-XHM-B, the WP pin provides hardware-level write inhibition: when pulled to VCC, it disables all write operations-including byte/page writes and software write protect register programming-regardless of software protection status. When tied to GND or left floating (internally pulled down), software-based protection modes become active. This dual-layer scheme ensures fail-safe protection during power-up, reset, or firmware update sequences where AT34C02D-XHM-B must retain factory-programmed SPD data without risk of corruption.

What distinguishes the permanent versus reversible software write protection on the AT34C02D-XHM-B?

The AT34C02D-XHM-B implements two independent software write protection schemes for its lower 128 bytes (00h–7Fh): permanent protection is enabled once via a specific command (0110 A2 A1 A0 0) and cannot be undone-even after power cycles-ensuring immutable factory SPD data; reversible protection uses distinct commands (62h to set, 66h to clear) and can be toggled in-field using VHV voltage (≥7 V) on A0. Both require WP = GND/floating and are enforced alongside hardware WP, giving AT34C02D-XHM-B granular, multi-level security for sensitive configuration regions.

Which package type does the AT34C02D-XHM-B use, and what are its key mechanical features?

The AT34C02D-XHM-B uses an 8-lead TSSOP (Thin Shrink Small Outline Package) with 4.4 mm body width, green RoHS-compliant construction, and NiPdAu lead finish. Its pin 1 is identified by a beveled corner on the top surface. The "XHM" suffix explicitly denotes this TSSOP variant with industrial temperature grade (–40°C to +85°C) and halogen-free materials. This package offers superior thermal performance and board-level reliability compared to SOIC, while maintaining compatibility with standard surface-mount assembly processes used in high-volume memory module manufacturing where AT34C02D-XHM-B is commonly deployed.

Can the AT34C02D-XHM-B operate reliably at 1.7 V, and what performance trade-offs apply?

Yes, the AT34C02D-XHM-B is fully specified for operation at 1.7 V minimum supply voltage, supporting low-power DDR implementations such as DDR3L (1.35 V nominal) and DDR4 (1.2 V nominal with level-shifting). At 1.7 V, its maximum I²C clock frequency is 400 kHz (vs. 1 MHz at 5.0 V), and standby current is rated at 1.0 μA. All core functions-including SPD read/write, page programming, and write protection-remain fully operational. This ensures AT34C02D-XHM-B maintains functional integrity across the full 1.7–5.5 V range without performance degradation beyond the specified timing limits.

AT34C02D-XHM-B Specifications

Product attributes: Attribute value

Manufacturer:: Microchip Technology

Series:: -

Package/Case:: 8-TSSOP (0.173", 4.40mm Width)

Packaging:: Tube

Product Status:: Active

Programmable:: Not Verified

Memory Type:: Non-Volatile

Memory Format:: EEPROM

Technology:: EEPROM

Memory Size:: 2Kbit

Memory Organization:: 256 x 8

Memory Interface:: I2C

Clock Frequency:: 1 MHz

Write Cycle Time - Word, Page:: 5ms

Access Time:: -

Voltage - Supply:: 1.7V ~ 5.5V

Operating Temperature:: -40°C ~ 85°C (TA)

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 8-TSSOP

AT34C02D-XHM-B FAQ

1.How can I place an order for AT34C02D-XHM-B through Aetrix?

Please submit a Request for Quotation (RFQ) for AT34C02D-XHM-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for AT34C02D-XHM-B reliable?

The price and inventory of AT34C02D-XHM-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT34C02D-XHM-B is usually 5 days.

3.What payment methods are accepted for AT34C02D-XHM-B?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT34C02D-XHM-B transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for AT34C02D-XHM-B?

AT34C02D-XHM-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your AT34C02D-XHM-B order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for AT34C02D-XHM-B?

For technical support, including AT34C02D-XHM-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT34C02D-XHM-B requirements.

6.How does Aetrix verify that AT34C02D-XHM-B is sourced from the original manufacturer or authorized distributors?

All AT34C02D-XHM-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT34C02D-XHM-B meets industry standards.

7.What is the process for return or replacement of AT34C02D-XHM-B?

All AT34C02D-XHM-B units undergo pre-shipment inspection (PSI). If there is an issue with AT34C02D-XHM-B, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The AT34C02D-XHM-B part is unused and in its original packaging.

Return procedure for AT34C02D-XHM-B:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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