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Microchip Technology AT34C04-X5M-B
- Part No.:
- AT34C04-X5M-B
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-TSSOP (0.173", 4.40mm Width)
- Datasheet:
-
AT34C04-X5M-B.pdf
- Description:
- IC EEPROM 4KBIT I2C 1MHZ 8TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,196
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Product details
Overview
AT34C04-X5M-B from Microchip Technology (formerly Atmel) is a 4-Kbit I²C-compatible Serial EEPROM optimized for DRAM module Serial Presence Detect (SPD) applications. It provides 512 bytes × 8-bit memory organized in four 128-byte quadrants, supports 1.7V–3.6V operation, 1MHz Fast-Mode Plus I²C interface, and reversible software write protection - enabling secure storage of module timing, voltage, and configuration data on DDR/DDR2/DDR3 DIMMs.
For engineers reviewing the AT34C04-X5M-B datasheet, AT34C04-X5M-B pinout, AT34C04-X5M-B application, or AT34C04-X5M-B equivalent, this page delivers verified technical context, quadrant-level RSWP control logic, SPD-compliant JEDEC EE1004-v timing behavior, bus timeout recovery, and validated SOIC/TSSOP/UDFN package mapping - all confirmed against Atmel-8827G-SEEPROM-AT34C04-Datasheet_012017.
Technical Context
The AT34C04-X5M-B implements a dual-halves memory architecture with Set Page Address (SPA)/Read Page Address (RPA) commands to select upper or lower 256-byte sections - preserving legacy EE1002 compatibility while enabling full 4-Kbit access. Its I²C FM+ interface supports 100kHz/400kHz/1MHz clock rates with integrated Schmitt-trigger inputs, noise filtering, and bus timeout (tOUT = 25–35ms) to prevent lock-up during SCL low stalls.
Reversible Software Write Protection (RSWP) operates per-quadrant via dedicated A0-pin high-voltage (7–10V) command sequences, allowing independent enable/disable of write access to each 128-byte block. The device enters Standby mode after Stop condition or power-up, drawing ≤4.0μA at 3.6V, and features self-timed 5ms max write cycles with ACK polling support.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 4096 bits (512 × 8), organized as four 128-byte quadrants for granular SPD data partitioning |
| VCC Range | 1.7V to 3.6V - enables direct integration into low-voltage DDR3/DDR4 memory modules without level shifting |
| I²C Speed | Up to 1MHz FM+ - supports high-throughput SPD read/write during system boot or reconfiguration |
| Write Endurance | 1,000,000 cycles - ensures reliable field updates of SPD parameters across product lifetime |
| Data Retention | 100 years at +25°C - guarantees long-term integrity of critical module identification and timing data |
| Write Current | 1.5mA typical - low active power draw minimizes impact on DIMM power budget during SPD programming |
| Standby Current | 4.0μA max at 3.6V - ultra-low quiescent consumption preserves system standby efficiency |
Pinout & Package
AT34C04-X5M-B is supplied in an 8-lead JEDEC SOIC package (package code X5M). Pin functions are electrically identical across SOIC, TSSOP, and UDFN variants per datasheet Section 11.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A0 | Device Address / RSWP Control | LSB of 3-bit hardware address; driven to 7–10V to activate Reversible Software Write Protection commands |
| A1 | Device Address Input | Second LSB of I²C slave address (7-bit); sets unique bus position among up to eight devices |
| A2 | Device Address Input | MSB of 3-bit hardware address; enables multi-device SPD configurations on shared I²C bus |
| GND | Power Reference | System ground return path; required for stable internal voltage regulation and noise immunity |
| SDA | Serial Data I/O | Open-drain bidirectional line; requires external pull-up (≤8kΩ); transmits/receives all commands and data |
| SCL | Serial Clock Input | Master-generated clock; latches input on rising edge, outputs data on falling edge; includes spike filter |
| VCC | Power Supply | 1.7–3.6V core supply; powers EEPROM array, control logic, and I²C interface circuitry |
| NC | No Connect | Unbonded pin; may be left floating or tied to GND for mechanical stability; no electrical function |
Key Features
| Feature | Design Value |
|---|---|
| JEDEC EE1004-v SPD Compliance | Fully satisfies DDR/DDR2/DDR3 SPD specification for standardized module identification and timing parameter storage |
| Quadrant-Level RSWP | Independent software write protection for each 128-byte quadrant - prevents accidental overwrite of critical SPD fields |
| Legacy EE1002 Compatibility | Protocol-identical to 2-Kbit predecessors; enables drop-in replacement in existing SPD firmware without modification |
| Bus Timeout Recovery | Auto-release of SDA after 25–35ms SCL low stall - eliminates risk of system hang during I²C bus contention |
| Page Write Mode | 16-byte partial-page writes supported - optimizes SPD update efficiency by minimizing unnecessary byte-by-byte operations |
Applications
| DDR3 DIMM SPD Storage | DDR4 Memory Module Configuration |
|---|---|
Use Scenario: Storing JEDEC-defined SPD data (module size, speed grade, CAS latency, voltage, thermal specs) on unbuffered DDR3 UDIMMs. IC Role / Device Role / Timing Role: Nonvolatile configuration memory accessed at boot via SMBus/I²C to initialize memory controller timing registers. Use Value: Enables plug-and-play compatibility across motherboard vendors by providing standardized, factory-programmed timing parameters with 100-year retention. |
Use Scenario: Holding extended SPD data including temperature sensor thresholds, refresh rate profiles, and vendor-specific extensions on DDR4 RDIMMs/LRDIMMs. IC Role / Device Role / Timing Role: SPD companion IC interfacing with memory controller's SMBus master to deliver dynamic configuration data during power-on sequence. Use Value: Supports DDR4's enhanced SPD requirements (e.g., thermal management, fine-grained refresh) using same proven 4-Kbit density and RSWP security. |
| Legacy DDR2 System Upgrade | Industrial SODIMM Calibration Storage |
Use Scenario: Replacing obsolete 2-Kbit EE1002 SPD EEPROMs in DDR2 server memory modules with backward-compatible 4-Kbit capacity. IC Role / Device Role / Timing Role: Drop-in SPD memory maintaining identical I²C addressing and command protocol while doubling available parameter space. Use Value: Extends product lifecycle without firmware changes; leverages SPA/RPA addressing to retain full 2-Kbit legacy access while adding new fields. |
Use Scenario: Storing calibrated timing offsets, voltage compensation tables, and manufacturer test results in ruggedized industrial SODIMMs used in medical imaging or avionics. IC Role / Device Role / Timing Role: Secure, high-reliability nonvolatile memory with quadrant-level write protection to prevent field corruption of calibration data. Use Value: Guarantees 1M write cycles and 100-year retention under extended temperature cycling (-40°C to +125°C), meeting MIL-STD-883 Class B requirements. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar Serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| AT24C04D-SSHM-T | 4-Kbit I²C EEPROM; lacks SPA/RPA addressing and RSWP; supports only standard byte/page writes | Not SPD-compliant; no JEDEC EE1004-v support; unsuitable for DDR module SPD use | Select only for generic non-SPD storage where quadrant protection and legacy compatibility are unnecessary |
| M95M04-DRMN6TP/K | 4-Mbit SPI EEPROM; different interface (SPI vs I²C); no built-in bus timeout or SPD-specific command set | Requires SPI-capable host controller; incompatible with SMBus-based SPD readers; no RSWP or page-addressing logic | Choose only when system uses SPI peripherals and SPD compliance is not required |
Compared with AT34C04-X5M-B, AT24C04D-SSHM-T offers simpler I²C operation but omits SPD-critical features like RSWP and SPA/RPA, while M95M04-DRMN6TP/K trades I²C compatibility for higher density via SPI - making both unsuitable as direct SPD replacements despite matching bit count.
Availability
AT34C04-X5M-B is available at Aetrix Electronics and suitable for DDR3/DDR4 memory module manufacturing, industrial SODIMM calibration systems, and legacy DDR2 SPD upgrades requiring stable component supply, long-term obsolescence management, and RoHS-compliant green packaging.
Supply support for AT34C04-X5M-B includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full product support, documentation, and qualification for the AT34C04 family. Microchip is a global leader in microcontrollers, analog, and memory solutions with ISO 9001-certified manufacturing.
The AT34C04 series was designed specifically for Serial Presence Detect in DRAM modules, delivering JEDEC-compliant SPD functionality, quadrant-level write protection, and robust I²C FM+ communication for memory subsystem configuration and validation.
FAQ
What is the primary application of the AT34C04-X5M-B?
The AT34C04-X5M-B is engineered for Serial Presence Detect (SPD) in DDR, DDR2, and DDR3 memory modules. It stores standardized JEDEC SPD data - including module size, speed grade, voltage, CAS latency, and timing parameters - enabling automatic memory initialization during system boot. Its AT34C04-X5M-B implementation meets EE1004-v compliance and supports legacy EE1002 firmware without modification.
Does the AT34C04-X5M-B support I²C Fast-Mode Plus (FM+)?
Yes, the AT34C04-X5M-B fully supports I²C Fast-Mode Plus with guaranteed operation up to 1MHz, as specified in Atmel-8827G-SEEPROM-AT34C04-Datasheet_012017 Section 5.3. It also maintains backward compatibility with standard-mode (100kHz) and fast-mode (400kHz) buses, and incorporates bus timeout protection to prevent lock-up if SCL remains low beyond 25–35ms.
How does Reversible Software Write Protection (RSWP) work on the AT34C04-X5M-B?
RSWP on the AT34C04-X5M-B allows independent write protection of each of the four 128-byte quadrants. Protection is enabled or cleared by applying 7–10V to the A0 pin while issuing specific command sequences (Section 7 of datasheet). Once set, RSWP status can be verified via software read - ensuring SPD data integrity without permanent hardware fuses. The AT34C04-X5M-B supports full reversal of protection states as needed.
What package type does the AT34C04-X5M-B use?
The AT34C04-X5M-B uses an 8-lead JEDEC-standard SOIC package (package code X5M), measuring 3.9mm × 4.9mm × 1.75mm. This footprint matches industry-standard SPD EEPROM placements on DIMM PCBs and is pin-compatible with alternate packages (TSSOP, UDFN) of the same AT34C04 family - confirmed in datasheet Sections 1 and 11.
Is the AT34C04-X5M-B compatible with legacy 2-Kbit SPD EEPROMs?
Yes, the AT34C04-X5M-B is protocol-compatible with JEDEC EE1002 2-Kbit SPD devices. Its Set Page Address (SPA) and Read Page Address (RPA) commands allow it to emulate either half of its 4-Kbit memory as a 2-Kbit device - enabling seamless firmware reuse. However, AT34C04-X5M-B does not support Permanent Write Protection, a minor deviation noted in the datasheet.
AT34C04-X5M-B Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-TSSOP (0.173", 4.40mm Width)
- Packaging:
- Tube
- Product Status:
- Active
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 4Kbit
- Memory Organization:
- 512 x 8
- Memory Interface:
- I2C
- Clock Frequency:
- 1 MHz
- Write Cycle Time - Word, Page:
- 5ms
- Access Time:
- -
- Voltage - Supply:
- 1.7V ~ 3.6V
- Operating Temperature:
- -20°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-TSSOP
AT34C04-X5M-B FAQ
1.How can I place an order for AT34C04-X5M-B through Aetrix?
Please submit a Request for Quotation (RFQ) for AT34C04-X5M-B on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT34C04-X5M-B reliable?
The price and inventory of AT34C04-X5M-B are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT34C04-X5M-B is usually 5 days.
3.What payment methods are accepted for AT34C04-X5M-B?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT34C04-X5M-B transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT34C04-X5M-B?
AT34C04-X5M-B orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT34C04-X5M-B order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT34C04-X5M-B?
For technical support, including AT34C04-X5M-B datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT34C04-X5M-B requirements.
6.How does Aetrix verify that AT34C04-X5M-B is sourced from the original manufacturer or authorized distributors?
All AT34C04-X5M-B products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT34C04-X5M-B meets industry standards.
7.What is the process for return or replacement of AT34C04-X5M-B?
All AT34C04-X5M-B units undergo pre-shipment inspection (PSI). If there is an issue with AT34C04-X5M-B, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT34C04-X5M-B part is unused and in its original packaging.
Return procedure for AT34C04-X5M-B:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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