Microchip Technology AT83C24B-TISUM

Overview

AT83C24B-TISUM from Microchip Technology is a smart card reader interface IC with integrated DC/DC converter, supporting ISO 7816, EMV2000, and GSM standards. It delivers programmable card supply voltages (5V ±5%, 3V ±0.2V, 1.8V ±0.14V), 8 kV+ ESD protection on card I/O pins, and operates from 4–48 MHz clock input. It is used in EFT/POS terminals and set-top boxes for secure, low-power smart card management.

For engineers reviewing the AT83C24B-TISUM datasheet, AT83C24B-TISUM pinout, AT83C24B-TISUM application, or AT83C24B-TISUM equivalent, key selection considerations include TWI-addressable multi-device configuration (up to 8), hardware- or software-controlled activation/deactivation sequences, CVCC voltage class compliance (Class A: 4.6–5.25 V), and SO28/QFN28 package compatibility with industrial temperature range (−40°C to +85°C).

Technical Context

The AT83C24B-TISUM implements a dual-mode power architecture: a high-efficiency (80–98%) step-up DC/DC converter for Class A/B card supply generation and an internal 3V regulator for digital core operation. Its TWI interface supports up to 400 kbit/s and enables full register-level control of card clock (CCLK), reset (CRST), I/O, C4/C8 contacts, and presence detection (CPRES).

It integrates dedicated hardware blocks including a 16-bit automatic reset transition (ART) timer for precise ATR timing compliance, programmable interrupt output (PRES/INT) with configurable IT_SEL mode, and transparent mode allowing direct microcontroller connection to CRST/CCLK via A1/RST and A2/CK pins - all synchronized to the 4–48 MHz master clock input.

Key Specifications

Pinout & Package

AT83C24B-TISUM is available in SO28 and QFN28 packages. Both variants share identical pin functions and electrical characteristics; pin numbering differs per package outline but signal mapping is consistent.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar smart card interface applications.

Compared with AT83C24NDS, AT83C24B-TISUM provides wider clock tolerance (4–48 MHz vs. 18–48 MHz) and relaxed CVCC capacitor requirements (up to 10 µF), making it more suitable for cost-sensitive, non-NDS-certified terminals. Versus SLB9670, AT83C24B-TISUM delivers full analog smart card interface functionality - including voltage regulation, ESD-hardened contacts, and ATR timing control - without requiring external power or signal conditioning.

Availability

AT83C24B-TISUM is available at Aetrix Electronics and suitable for EFT/POS terminals, set-top boxes, and secure ID readers requiring stable component supply across industrial temperature ranges and long product lifecycles.

Supply support for AT83C24B-TISUM includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a U.S.-based semiconductor manufacturer specializing in microcontrollers, analog, and interface solutions for industrial, automotive, and consumer markets.

The AT83C24B-TISUM belongs to Microchip's Smart Card Interface Bus (SCIB) product line, designed specifically to simplify ISO 7816-compliant reader development with integrated power management, timing control, and robust physical layer protection.

FAQ

What is the minimum clock frequency required for AT83C24B-TISUM step-up converter operation?

The AT83C24B-TISUM requires a minimum 7 MHz clock input for proper operation of its internal step-up DC/DC converter. This is specified in the official datasheet (4234G–SCR–01/07, page 2). Clock frequencies below 7 MHz may prevent CVCC regulation and result in unstable card power delivery. The full operational range remains 4–48 MHz, but step-up functionality is only guaranteed above 7 MHz.

Does AT83C24B-TISUM support both 3V and 5V smart cards simultaneously?

No, AT83C24B-TISUM supports only one card voltage class per session: either 5V (Class A), 3V (Class B), or 1.8V - selected via VCARD[1:0] bits in CONFIG0 register. Switching between voltages requires full card deactivation first. The device does not provide concurrent dual-voltage outputs; CVCC is a single programmable rail. This behavior is confirmed in the "Activation Sequence" section (page 14) and electrical characteristics table.

How is card presence detected on AT83C24B-TISUM, and can the detection logic be inverted?

Card presence is detected via the CPRES pin, with polarity configurable using the CARDDET bit in CONFIG1 register. When CARDDET = 1, card presence is indicated by CPRES = 1 (open-collector pull-up to VCC); when CARDDET = 0, presence is CPRES = 0 (requires external pull-down). An internal pull-up can be enabled/disabled via the PULLUP bit. This dual-polarity support is documented in the "Card Presence Detection" section (page 10) and Figure 4.

Is AT83C24B-TISUM pin-compatible with AT83C24NDS?

Yes, AT83C24B-TISUM is pin-compatible with AT83C24NDS in both SO28 and QFN28 packages, sharing identical pinout, signal names, and electrical characteristics. However, functional differences exist: AT83C24NDS enforces stricter clock (≥18 MHz) and CVCC capacitor (3.3 µF mandatory) requirements. The shared pinout allows PCB reuse, but firmware and layout must comply with the specific variant's constraints.

What TWI address options are available for AT83C24B-TISUM, and how are they set?

AT83C24B-TISUM supports eight unique TWI slave addresses (0x40–0x4E for write, 0x41–0x4F for read), determined by the logic levels on A2/CK, A1/RST, and A0/3V pins at reset. Address sampling occurs on the 11th CLK rising edge after RESET assertion. This addressing scheme is defined in Table 2 (page 7) and enables up to eight devices on a single TWI bus without address conflict.