Microchip Technology AT91SAM9CN12-CUR

Overview

AT91SAM9CN12-CUR from Microchip Technology is a secure Arm926EJ-S™-based embedded MPU operating at up to 400 MHz core frequency, featuring 128 KB on-chip ROM (secure boot), 32 KB SRAM, hardware AES-256/SHA256 accelerators, TRNG, and 105 programmable I/Os. It integrates LCD controller, USB Host/Device, SDIO, dual SPI/I²C, 4x USART, 12-channel 10-bit ADC with touchscreen support, and DDR2/LPDDR/NAND Flash interfaces - deployed in industrial HMI and secure edge gateway applications.

For engineers reviewing the AT91SAM9CN12-CUR datasheet, AT91SAM9CN12-CUR pinout, AT91SAM9CN12-CUR application, or AT91SAM9CN12-CUR equivalent, key selection criteria include secure boot ROM presence, 217-ball 0.8 mm BGA package compatibility, cryptographic acceleration support (AES/SHA/TRNG), and dual-voltage I/O (1.8V/3.3V) with no external level shifters required.

Technical Context

The AT91SAM9CN12-CUR implements an Arm926EJ-S core with MMU, 16 KB instruction and 16 KB data caches, and runs at up to 400 MHz. Its system bus operates at 133 MHz with eight DMA channels and distributed memory architecture including 32 KB SRAM - enabling concurrent high-bandwidth peripheral access without CPU bottlenecks.

Security is implemented via dedicated on-die hardware: AES-256/192/128 encryption, FIPS 180-2-compliant SHA1/SHA256 authentication, NIST SP 800-22–compliant TRNG, and 256 fuse bits for crypto key storage. The device includes a secure Boot ROM (not present in SAM9N12/SAM9CN11), JTAG disabled by default, and forced boot-from-ROM configuration capability.

Key Specifications

Pinout & Package

The AT91SAM9CN12-CUR is packaged in a RoHS-compliant 217-ball BGA with 0.8 mm ball pitch. Power domains include VDDCORE (1.0–1.2 V), VDDIOP0/VDDIOP1 (1.8/3.3 V I/O), VDDANA (3.0–3.6 V analog), VDDUSB (3.3 V), and dedicated backup (VDDBU), PLL (VDDPLL), and oscillator (VDDOSC) rails. All I/Os are individually configurable with switchable pull-up/pull-down (50–100 kΩ) and Schmitt trigger input option.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar embedded MPU applications.

Compared with AT91SAM9X35-CU and ATSAMA5D36-CU, the AT91SAM9CN12-CUR uniquely delivers certified cryptographic acceleration and immutable secure boot in a mature, qualification-ready Arm9 platform - making it irreplaceable for applications requiring FIPS-aligned data-at-rest and data-in-transit protection without external security ICs.

Availability

AT91SAM9CN12-CUR is available at Aetrix Electronics and suitable for industrial HMI terminals, secure edge gateways, medical data loggers, and ruggedized vehicle telematics units requiring stable component supply across extended product lifecycles.

Supply support for AT91SAM9CN12-CUR includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Microchip Technology is a leading provider of microcontrollers, analog, FPGA, and security solutions, with deep expertise in embedded control and trusted computing.

The SAM9CN family was designed specifically for secure, low-power industrial and medical applications requiring hardware-enforced trust anchors, cryptographic acceleration, and long-term availability - distinguishing it from general-purpose MPUs.

FAQ

What distinguishes AT91SAM9CN12-CUR from the AT91SAM9N12?

The AT91SAM9CN12-CUR includes a secure Boot ROM, hardware AES-256/SHA256 accelerators, True Random Number Generator (TRNG), and 256 fuse bits for crypto key storage - features absent in the AT91SAM9N12. The AT91SAM9N12 uses a standard Boot ROM and lacks cryptographic hardware, making the AT91SAM9CN12-CUR the only variant qualified for FIPS 140-2–aligned secure boot and data encryption workflows.

Does AT91SAM9CN12-CUR support DDR2 memory, and what is the maximum data rate?

Yes, AT91SAM9CN12-CUR supports DDR2 memory via its 32-bit External Bus Interface with dedicated SDRAM controller. It supports DDR2-400 (200 MHz clock, 400 MT/s effective data rate) with programmable timing parameters, CAS latency, and burst length - validated for industrial temperature range operation with JEDEC-compliant DDR2 SDRAM modules.

Can AT91SAM9CN12-CUR operate with both 1.8 V and 3.3 V I/Os simultaneously?

Yes, AT91SAM9CN12-CUR supports simultaneous 1.8 V and 3.3 V I/O operation through four independently configurable I/O banks (VDDIOP0, VDDIOP1, etc.). Each bank's voltage is set by its respective power rail, allowing mixed-voltage interfaces - for example, 3.3 V USB transceivers and 1.8 V LPDDR memory on the same device - without external level shifters.

Is the AT91SAM9CN12-CUR pin-compatible with other SAM9 series MPUs like AT91SAM9G25?

No, AT91SAM9CN12-CUR is not pin-compatible with AT91SAM9G25 or other SAM9 variants. It uses a unique 217-ball BGA (0.8 mm pitch) or 247-ball BGA (0.5 mm pitch) footprint with distinct power rail assignments, I/O multiplexing, and peripheral signal mapping - requiring dedicated PCB layout and schematic design for the AT91SAM9CN12-CUR.

What debug interfaces are available on AT91SAM9CN12-CUR, and is JTAG accessible?

The AT91SAM9CN12-CUR provides JTAG boundary scan and SWD-compatible debug via TCK/TDI/TDO/TMS/RTCK/NTRST pins, but JTAG access is disabled by default and can only be enabled by programming specific fuse bits during manufacturing. Production units typically ship with JTAG permanently disabled for security; debugging relies on the DBGU (Debug Unit) serial interface using DRXD/DTXD pins instead.