Microchip Technology AT93C46-10SI-2.5
- Part No.:
- AT93C46-10SI-2.5
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-SOIC (0.154", 3.90mm Width)
- Datasheet:
-
AT93C46-10SI-2.5.pdf
- Description:
- IC EEPROM 1KBIT 3-WIRE 8SOIC
- Quantity:
- Payment:

- Shipping:

Inventory:4,619
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT93C46-10SI-2.5 from Microchip Technology (formerly Atmel) is a 1K-bit 3-wire serial EEPROM with user-selectable 128 × 8 or 64 × 16 organization, operating from 2.5V to 5.5V, featuring 10 ms max self-timed write cycle and 1 million write endurance. It serves as nonvolatile configuration storage in industrial control modules, embedded sensor nodes, and power management ICs requiring low-voltage operation.
For engineers reviewing the AT93C46-10SI-2.5 datasheet, AT93C46-10SI-2.5 pinout, AT93C46-10SI-2.5 application, or AT93C46-10SI-2.5 equivalent, key selection criteria include VCC range compatibility (2.5–5.5V), industrial temperature rating (−40°C to +85°C), SOIC-8 JEDEC package footprint, and 3-wire interface timing at ≤500 kHz under 2.5V conditions.
Technical Context
The AT93C46-10SI-2.5 implements a synchronous 3-wire serial interface (CS, SK, DI/DO) with instruction-based command set including READ, WRITE, ERASE, EWEN, and EWDS. Its ORG pin selects between x8 and x16 memory organization, enabling flexible byte- or word-oriented access without external logic.
Write operations are self-timed with no external erase step required; READY/BUSY status is reported via DO during CS high after tCS ≥ 250 ns. The device uses internal charge-pump circuitry to support programming at 2.5V, maintaining full functionality across its specified voltage range.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 1024 bits (128 × 8 or 64 × 16 organization) |
| Supply Voltage Range | 2.5V to 5.5V - enables direct interfacing with 2.5V/3.3V microcontrollers without level shifting |
| Max Clock Frequency | 500 kHz at 2.5V - defines maximum serial data throughput for configuration reads/writes |
| Write Cycle Time | 10 ms max - determines minimum time between successive write commands; impacts firmware update latency |
| Endurance | 1 million write cycles - supports frequent recalibration or field-upgrade logging in industrial equipment |
| Data Retention | 100 years - ensures long-term reliability of stored calibration constants or security keys |
| Operating Temperature | −40°C to +85°C - qualified for use in industrial automation, automotive body electronics, and outdoor metering |
Pinout & Package
AT93C46-10SI-2.5 is housed in an 8-lead JEDEC-standard SOIC package (8S1), 0.150" wide, with gull-wing leads and standard 1.27 mm pitch. Pin 1 is marked by a beveled corner or dot; orientation follows JEDEC MS-001 BA.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable signal; must be held low for entire instruction sequence; initiates READY/BUSY status reporting when raised post-write |
| SK | Serial Clock | Synchronous edge-triggered clock input; rising edge latches DI, samples DO; timing constrained to tSKH/tSKL ≥ 500 ns at 2.5V |
| DI | Data Input | Serial command and address/data input; accepts 7-bit address + 2-bit opcode for READ/WRITE/ERASE instructions |
| DO | Data Output | Open-drain output with internal pull-up; delivers read data or READY/BUSY status ('1' = ready, '0' = busy) |
| VCC | Power Supply | Primary supply rail; powers internal logic and charge pump; must remain stable during write cycles to prevent corruption |
| GND | Ground | Reference return path for all I/O and internal circuitry; requires low-impedance connection to system ground plane |
| ORG | Organization Select | Logic-high (VCC) selects 64 × 16 mode; logic-low (GND) selects 128 × 8 mode; unconnected defaults to x16 via internal ~1 MΩ pull-up |
| DC | Don't Connect | No internal connection; must be left floating or tied to GND/VCC per layout best practice; not used in JEDEC SOIC variant |
Key Features
| Feature | Design Value |
|---|---|
| Low-voltage operation down to 2.5V | Enables direct integration with 2.5V FPGA configuration PROMs and ultra-low-power MCU peripherals |
| User-selectable memory organization | Supports both byte-addressable (128 × 8) and word-addressable (64 × 16) access modes via single ORG pin, reducing software abstraction layer complexity |
| Self-timed write cycle with status feedback | Eliminates need for fixed delay loops in firmware; DO pin provides real-time READY/BUSY indication during programming |
| Industrial temperature grade (−40°C to +85°C) | Validated for deployment in motor drives, PLC I/O modules, and smart grid infrastructure without derating |
| ESD protection >4000V HBM | Reduces risk of field failure during handling or board-level ESD events in factory or service environments |
Applications
| Industrial Sensor Calibration | Embedded Power Management |
|---|---|
Use Scenario: Storing factory-trimmed offset/gain coefficients and temperature compensation tables in pressure transmitters and RTD interfaces. IC Role / Device Role / Timing Role: Nonvolatile configuration register providing persistent parameter storage accessible via SPI-compatible 3-wire bus during boot or runtime recalibration. Use Value: Enables zero-point and span adjustment without external MCU flash usage; retains values across cold starts and brown-out events. |
Use Scenario: Holding dynamic voltage/frequency scaling (DVFS) profiles and fault log history in DC-DC controller modules for telecom base stations. IC Role / Device Role / Timing Role: Serial configuration memory interfaced to PMIC's host interface for loading operational parameters during power-up sequencing. Use Value: Supports adaptive power policy updates in-field; 1M endurance allows daily profile revisions over 27 years of continuous operation. |
| Automotive Body Control | Medical Device Configuration |
Use Scenario: Saving seat/mirror position presets and lighting dimming curves in vehicle body control units (BCUs). IC Role / Device Role / Timing Role: Low-voltage EEPROM accessed by 8-bit automotive MCU over dedicated 3-wire bus for user preference persistence. Use Value: Operates reliably at 2.5V during battery brown-out conditions; industrial temp rating covers under-hood ambient extremes. |
Use Scenario: Storing FDA-mandated calibration audit trails and device-specific safety thresholds in portable infusion pumps. IC Role / Device Role / Timing Role: Tamper-resistant nonvolatile memory storing immutable configuration records with traceable write timestamps. Use Value: 100-year data retention meets medical device regulatory archiving requirements; ESD robustness prevents corruption during clinical handling. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95128-WMN6TP | 128 Kbit SPI interface (4-wire), 2.5–5.5V, 20 MHz clock, WLCSP package | Higher density and faster interface but requires SPI master with CS/CLK/MOSI/MISO; incompatible pinout and protocol | Select when migrating to higher-density storage with existing SPI infrastructure and PCB redesign allowance |
| 25AA010A-I/SN | 1 Kbit SPI EEPROM, 1.8–5.5V, 10 MHz, SOIC-8, same 2.5V min spec | Identical memory size and voltage range; differs in instruction set (SPI vs 3-wire), no ORG pin flexibility | Choose for drop-in replacement where SPI is already implemented and x8/x16 organization switching is unnecessary |
Compared with M95128-WMN6TP and 25AA010A-I/SN, the AT93C46-10SI-2.5 uniquely offers hardware-selectable memory organization and true 3-wire simplicity-reducing MCU GPIO count and eliminating MOSI/MISO routing-while maintaining industrial temperature compliance and proven field reliability in cost-sensitive embedded systems.
Availability
AT93C46-10SI-2.5 is available at Aetrix Electronics and suitable for industrial sensor calibration, embedded power management, automotive body control, and medical device configuration requiring stable component supply across extended temperature ranges and long product lifecycles.
Supply support for AT93C46-10SI-2.5 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full support for the legacy AT93C family. The company specializes in microcontrollers, analog, and memory solutions for industrial, automotive, and consumer markets.
The AT93C46 series was designed specifically for space-constrained, low-power embedded systems needing reliable, pin-efficient nonvolatile storage-emphasizing voltage flexibility, endurance, and ease of integration into resource-limited MCUs.
FAQ
What is the maximum clock frequency supported by AT93C46-10SI-2.5 at 2.5V?
The AT93C46-10SI-2.5 supports a maximum SK clock frequency of 500 kHz when operated at 2.5V, as specified in the AC Characteristics table for VCC = 2.5V to 5.5V. This limit ensures reliable setup/hold timing for DI and DO signals under low-voltage conditions. Exceeding this frequency may result in read corruption or failed write verification. The AT93C46-10SI-2.5 datasheet confirms tSKH and tSKL minimums of 500 ns at this voltage.
Does AT93C46-10SI-2.5 require an external erase cycle before writing?
No, the AT93C46-10SI-2.5 performs self-timed erase-and-write internally during each WRITE instruction-no separate ERASE command is needed prior to programming. The device automatically erases the target location before writing new data, completing the full operation within the 10 ms max tWP window. This simplifies firmware design and eliminates risk of partial writes. The AT93C46-10SI-2.5 functional description explicitly states "no separate ERASE cycle is required before WRITE."
How is memory organization selected on AT93C46-10SI-2.5?
Memory organization on the AT93C46-10SI-2.5 is selected via the ORG pin: tying ORG to VCC configures the device as 64 × 16 (x16 mode), while tying it to GND selects 128 × 8 (x8 mode). If left unconnected, an internal ~1 MΩ pull-up defaults to x16 mode. This hardware-selectable feature allows one AT93C46-10SI-2.5 part number to serve both byte- and word-oriented applications without firmware changes.
What package type does AT93C46-10SI-2.5 use, and is it JEDEC-compliant?
The AT93C46-10SI-2.5 uses an 8-lead JEDEC-standard SOIC package (designated 8S1), 0.150" wide, with gull-wing leads and 1.27 mm pitch, fully compliant with JEDEC MS-001 BA. This package is compatible with standard SOIC-8 footprints and reflow profiles, enabling drop-in replacement in existing designs using similar Atmel/Microchip EEPROMs. The AT93C46-10SI-2.5 ordering information confirms "8S1" as the package code.
Can AT93C46-10SI-2.5 operate reliably at −40°C?
Yes, the AT93C46-10SI-2.5 is rated for industrial temperature operation from −40°C to +85°C, as indicated by the "I" suffix in its part number and confirmed in the Ordering Information table. All DC and AC specifications-including standby current, write cycle time, and clock timing-are guaranteed across this full range. The AT93C46-10SI-2.5 has been validated in applications such as outdoor utility meters and factory-floor PLCs where sub-zero startup is required.
AT93C46-10SI-2.5 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-SOIC (0.154", 3.90mm Width)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 1Kbit
- Memory Organization:
- 128 x 8, 64 x 16
- Memory Interface:
- 3-Wire Serial
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- -
- Voltage - Supply:
- 2.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 8-SOIC
AT93C46-10SI-2.5 FAQ
1.How can I place an order for AT93C46-10SI-2.5 through Aetrix?
Please submit a Request for Quotation (RFQ) for AT93C46-10SI-2.5 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT93C46-10SI-2.5 reliable?
The price and inventory of AT93C46-10SI-2.5 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT93C46-10SI-2.5 is usually 5 days.
3.What payment methods are accepted for AT93C46-10SI-2.5?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT93C46-10SI-2.5 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT93C46-10SI-2.5?
AT93C46-10SI-2.5 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT93C46-10SI-2.5 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT93C46-10SI-2.5?
For technical support, including AT93C46-10SI-2.5 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT93C46-10SI-2.5 requirements.
6.How does Aetrix verify that AT93C46-10SI-2.5 is sourced from the original manufacturer or authorized distributors?
All AT93C46-10SI-2.5 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT93C46-10SI-2.5 meets industry standards.
7.What is the process for return or replacement of AT93C46-10SI-2.5?
All AT93C46-10SI-2.5 units undergo pre-shipment inspection (PSI). If there is an issue with AT93C46-10SI-2.5, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT93C46-10SI-2.5 part is unused and in its original packaging.
Return procedure for AT93C46-10SI-2.5:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT93C46-10SI-2.5 Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…
