Microchip Technology AT93C56-10PI
- Part No.:
- AT93C56-10PI
- Manufacturer:
- Microchip Technology
- Category:
- Memory
- Package:
- 8-DIP (0.300", 7.62mm)
- Datasheet:
-
AT93C56-10PI.pdf
- Description:
- IC EEPROM 2KBIT 3-WIRE 2MHZ 8DIP
- Quantity:
- Payment:

- Shipping:

Inventory:2,542
Please send an inquiry. Send us your inquiry, and we will respond immediately.
Product details
Overview
AT93C56-10PI from Microchip Technology (formerly Atmel) is a 2K-bit serial EEPROM with 3-wire interface, supporting user-selectable 256 × 8 or 128 × 16 organization via the ORG pin, operating across 2.7V–5.5V supply, and rated for industrial temperature range (−40°C to +85°C). It delivers 1 million write cycles, 100-year data retention, and self-timed 10 ms max write cycle - deployed in embedded system configuration storage, sensor calibration data logging, and industrial controller parameter backup.
For engineers reviewing the AT93C56-10PI datasheet, AT93C56-10PI pinout, AT93C56-10PI application, or AT93C56-10PI equivalent, key selection criteria include voltage compatibility (2.7V–5.5V), industrial-grade temperature rating, 3-wire serial timing constraints (2 MHz @ 5V), ORG-pin configurable memory width, and PDIP/SOIC/TSSOP package options matching board layout requirements.
Technical Context
The AT93C56-10PI implements a synchronous 3-wire serial interface (CS, SK, DI/DO) with instruction-based command set including READ, WRITE, ERASE, EWEN, EWDS, ERAL, and WRAL. Memory access is controlled by an 9-bit address (A8–A0) for x8 mode or 7-bit address (A7–A0) for x16 mode, selected by ORG pin state.
It features internal erase/write enable logic requiring explicit EWEN before programming, READY/BUSY status reporting via DO during active cycles, and no external erase step - all operations are self-timed with tWP ≤ 10 ms at VCC ≥ 4.5V and ≤ 30 ms at VCC = 2.7V. Standby current is 10 µA max at 2.7V, supporting low-power embedded operation.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Memory Size | 2048 bits (256 × 8 or 128 × 16 organization) |
| Supply Voltage | 2.7V to 5.5V - supports mixed-voltage systems and battery-backed operation |
| Write Cycle Time | ≤10 ms max (at VCC ≥ 4.5V); ≤30 ms max (at VCC = 2.7V) - determines minimum firmware delay between writes |
| Endurance | 1,000,000 write/erase cycles - enables long-term field recalibration without wear-out concerns |
| Data Retention | 100 years at 25°C - ensures configuration integrity over product lifetime without refresh |
| Operating Temp | −40°C to +85°C - qualified for industrial control, automotive under-hood, and outdoor equipment |
| Interface Speed | 2 MHz max clock rate at 5V; 1 MHz at 2.7V - sets maximum serial throughput for host MCU |
Pinout & Package
AT93C56-10PI is supplied in 8-pin PDIP (8P3), JEDEC SOIC (8S1), EIAJ SOIC (8S2), and TSSOP (8T) packages. Pin functions are identical across all variants.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| CS | Chip Select | Active-low enable; must be held low for entire instruction sequence; controls DO high-impedance state |
| SK | Serial Clock | Synchronizes all data transfers; rising edge samples DI, falling edge outputs DO |
| DI | Data Input | Receives start bit, op code, address, and write data; latched on SK rising edge |
| DO | Data Output | Outputs read data, READY/BUSY status, or high-Z when CS high; synchronized to SK falling edge |
| GND | Ground Reference | Return path for VCC and signal currents; requires low-impedance PCB connection |
| VCC | Power Supply | 2.7V–5.5V input; bypass capacitor (0.1 µF) required near pin for noise immunity |
| ORG | Organization Select | High = 128 × 16 mode; low = 256 × 8 mode; unconnected defaults to x16 via internal ~1 MΩ pull-up |
| DC | No Connect | Internally unused; must be left floating or tied to GND/VCC per layout best practice (no electrical function) |
Key Features
| Feature | Design Value |
|---|---|
| User-selectable memory organization | Hardware-configurable 256 × 8 or 128 × 16 via ORG pin - eliminates need for software bit-packing in host firmware |
| Self-timed write cycle | No external timing control needed; host reads DO pin for READY/BUSY - simplifies driver implementation and reduces MCU overhead |
| Industrial temperature rating | −40°C to +85°C operation - enables deployment in PLCs, motor drives, and factory automation without derating |
| Low standby current | 10 µA max at 2.7V - extends battery life in portable or energy-harvesting applications |
| ESD protection | >4000V HBM - improves robustness during handling and in electrically noisy industrial environments |
Applications
| Industrial PLC Configuration Storage | Automotive Sensor Calibration Data |
|---|---|
Use Scenario: Storing I/O mapping, PID tuning parameters, and alarm thresholds in programmable logic controllers. IC Role / Device Role / Timing Role: Nonvolatile configuration register accessed infrequently during commissioning or maintenance. Use Value: Ensures parameter persistence across power loss and firmware updates without external backup circuitry. |
Use Scenario: Retaining temperature-compensated offset/gain coefficients for pressure or oxygen sensors in engine control units. IC Role / Device Role / Timing Role: Calibration data repository written once per vehicle assembly and read at boot. Use Value: Maintains measurement accuracy over 15+ year vehicle lifetime with guaranteed 100-year data retention. |
| Medical Device Setup Parameters | Smart Meter Firmware Options |
Use Scenario: Holding user-defined therapy profiles, alarm limits, and language settings in portable infusion pumps. IC Role / Device Role / Timing Role: Secure, tamper-resistant storage of regulatory-required operational parameters. Use Value: Meets IEC 62304 data integrity requirements with 1M-cycle endurance for field updates. |
Use Scenario: Storing tariff schedules, communication protocol flags, and metering constants in utility smart meters. IC Role / Device Role / Timing Role: Field-upgradable option register accessed during meter initialization. Use Value: Enables remote firmware feature activation without hardware change or re-certification. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar serial EEPROM applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| M95256-DRMN6TP/K | 256 Kbit SPI interface (4-wire), 2.5V–5.5V, 5 ms write cycle, SO8 package | Higher density, faster write, but requires SPI host support instead of 3-wire | Select if migrating to SPI infrastructure or needing >2K capacity; not pin-compatible |
| STK12C68-55I | NVSRAM (64K × 8), parallel interface, 5V-only, 15 ns access, DIP28 package | Byte-level random access, no write delay, but larger footprint and higher power | Choose for legacy 8-bit bus systems requiring zero-write-latency nonvolatile storage |
Compared with M95256-DRMN6TP/K and STK12C68-55I, the AT93C56-10PI offers minimal pin count (8-pin), ultra-low standby current, and hardware-selectable organization - making it optimal for space-constrained, battery-sensitive, or legacy 3-wire designs where 2K capacity suffices.
Availability
AT93C56-10PI is available at Aetrix Electronics and suitable for industrial PLCs, automotive ECUs, medical infusion devices, and smart metering systems requiring stable component supply across extended product lifecycles.
Supply support for AT93C56-10PI includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Microchip Technology acquired Atmel in 2016 and maintains full support for the legacy AT93C family. The company specializes in microcontrollers, analog, and memory solutions for industrial, automotive, and consumer markets.
The AT93C56-10PI belongs to Atmel's legacy 3-wire serial EEPROM product line, designed specifically for cost-sensitive, low-pin-count embedded systems requiring reliable nonvolatile storage with minimal host resource usage.
FAQ
What is the maximum clock frequency supported by AT93C56-10PI?
The AT93C56-10PI supports up to 2 MHz SK clock frequency at VCC = 4.5V–5.5V, 1 MHz at VCC = 2.7V–5.5V, and 500 kHz at VCC = 2.5V–5.5V. These values are specified in the AC Characteristics table and define the upper limit for reliable serial data transfer timing in the AT93C56-10PI interface.
How does the ORG pin affect memory organization in AT93C56-10PI?
In AT93C56-10PI, connecting ORG to VCC selects 128 × 16 organization (16-bit words), while tying ORG to GND selects 256 × 8 organization (8-bit bytes). If left unconnected, an internal ~1 MΩ pull-up defaults to x16 mode. This hardware-selectable width avoids firmware bit manipulation overhead.
Is AT93C56-10PI compatible with 1.8V operation?
No. The AT93C56-10PI is rated for 2.7V–5.5V operation only. 1.8V variants exist in the AT93C46 family (e.g., AT93C46-10PI-1.8), but AT93C56-10PI is not characterized or guaranteed below 2.7V - attempting 1.8V operation may result in unreliable read/write behavior.
What is the purpose of the DC pin on AT93C56-10PI?
The DC (Don't Connect) pin on AT93C56-10PI has no internal connection and serves no electrical function. It must remain unconnected or be tied to GND/VCC solely for mechanical stability - its presence accommodates shared package footprints across the AT93C46/56/57/66 family.
Does AT93C56-10PI require an external erase command before writing?
No. The AT93C56-10PI performs automatic erase-before-write internally. A WRITE instruction initiates a self-timed cycle that erases and programs the target location in one atomic operation - eliminating separate ERASE commands and simplifying host firmware logic for the AT93C56-10PI.
AT93C56-10PI Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Microchip Technology
- Series:
- -
- Package/Case:
- 8-DIP (0.300", 7.62mm)
- Packaging:
- Tube
- Product Status:
- Obsolete
- Programmable:
- Not Verified
- Memory Type:
- Non-Volatile
- Memory Format:
- EEPROM
- Technology:
- EEPROM
- Memory Size:
- 2Kbit
- Memory Organization:
- 256 x 8, 128 x 16
- Memory Interface:
- 3-Wire Serial
- Clock Frequency:
- 2 MHz
- Write Cycle Time - Word, Page:
- 10ms
- Access Time:
- -
- Voltage - Supply:
- 4.5V ~ 5.5V
- Operating Temperature:
- -40°C ~ 85°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Through Hole
- Supplier Device Package:
- 8-PDIP
AT93C56-10PI FAQ
1.How can I place an order for AT93C56-10PI through Aetrix?
Please submit a Request for Quotation (RFQ) for AT93C56-10PI on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for AT93C56-10PI reliable?
The price and inventory of AT93C56-10PI are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for AT93C56-10PI is usually 5 days.
3.What payment methods are accepted for AT93C56-10PI?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for AT93C56-10PI transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for AT93C56-10PI?
AT93C56-10PI orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your AT93C56-10PI order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for AT93C56-10PI?
For technical support, including AT93C56-10PI datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your AT93C56-10PI requirements.
6.How does Aetrix verify that AT93C56-10PI is sourced from the original manufacturer or authorized distributors?
All AT93C56-10PI products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that AT93C56-10PI meets industry standards.
7.What is the process for return or replacement of AT93C56-10PI?
All AT93C56-10PI units undergo pre-shipment inspection (PSI). If there is an issue with AT93C56-10PI, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The AT93C56-10PI part is unused and in its original packaging.
Return procedure for AT93C56-10PI:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
AT93C56-10PI Tags

-
M24C02-WMN6TP
STMicroelectronics
-
AT24C02C-XHM-T
Microchip Technology

-
AT21CS01-STUM10-T
Microchip Technology

-
AT24C02C-SSHM-T
Microchip Technology

-
24LC01BT-I/OT
Microchip Technology
-
M24C02-FMC6TG
STMicroelectronics

-
AT24CS02-SSHM-T
Microchip Technology

-
93LC46BT-I/OT
Microchip Technology

-
AT24C04C-SSHM-T
Microchip Technology

-
24LC01BT-I/SN
Microchip Technology

-
24AA02UIDT-I/OT
Microchip Technology

-
AT24C08C-STUM-T
Microchip Technology
Tech Hub
TTL and CMOS logic families differ in thresholds, loading, output drive, power and timing. This engineering guide compares 74HC and 74HCT, calculates noise margins and checks 3.3 V/5 V compatibility.
A practical engineering guide to 3.3V and 5V logic compatibility, input thresholds, resistor dividers, translator ICs, MOSFET level shifting, I2C pull-ups, timing limits and power-sequencing risks.
The 74HC595 uses push-pull logic outputs, while the TPIC6B595 uses 50 V open-drain DMOS sinks for higher-power loads. This guide compares timing, current limits, 3.3 V interfacing, load wiring, thermal…
The 74HC595 converts serial data into eight stable parallel outputs. This guide covers pin functions, shift and storage timing, OE and MR behavior, drive-current limits, cascading, voltage compatibilit…
A technical comparison of level-sensitive latches and edge-triggered flip-flops, covering timing windows, setup and hold limits, master–slave operation, time borrowing, race-through, HDL inference and…
A D latch stores one bit while Enable controls when data can pass. This reference covers gate-level operation, truth tables, transparency, setup and hold timing, LE versus OE, common ICs and practical …
An SR latch stores one bit through cross-coupled feedback. This engineering reference covers NOR and NAND implementations, truth tables, forbidden-state recovery, gated operation, switch debouncing, fa…
Latch circuits retain one bit through feedback. This technical reference covers SR and D latches, truth tables, transparency, timing limits, latch-versus-flip-flop behavior, applications and common log…
An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…
Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

